On 06/29/2017 05:20 AM, Wilco Dijkstra wrote: > Richard Biener wrote: >> Hurugalawadi, Naveen wrote: >>> The code (m1 > m2) * d code should be optimized as m1> m2 ? d : 0. > >> What's the reason of this transform? I expect that the HW multiplier >> is quite fast given one operand is either zero or one and a multiplication >> is a gimple operation that's better handled in optimizations than >> COND_EXPRs which eventually expand to conditional code which >> would be much slower. > > Even really fast multipliers have several cycles latency, and this is > generally > fixed irrespectively of the inputs. Maybe you were thinking about division? And on some targets, just getting the arguments into the right register bank is many cycles. Think HPPA where integer multiply occurs in the floating point unit. Though I don't think that oddity should drive this discussion.
> > Additionally integer multiply typically has much lower throughput than other > ALU operations like conditional move - a modern CPU may have 4 ALUs > but only 1 multiplier, so removing redundant integer multiplies is always > good. I'd tend to agree in general. jeff
