[PATCH, i386]: Fix PR81641, assemble failure with named address spaces and -masm=intel

[Uros Bizjak]

Using -O -masm=intel following testcase (gcc.target/i386/addr-space-2.c):

--cut here--
int test(void)
{
  int __seg_fs *f = (int __seg_fs *)16;
  int __seg_gs *g = (int __seg_gs *)16;
  return *f + *g;
}
--cut here--

compiles to:

        mov     eax, DWORD PTR gs:ds:16
        add     eax, DWORD PTR fs:ds:16
        ret

Fortunately (?) gas doesn't error out on this assembly and generates
correct object file:

0000000000000000 <test>:
   0:   65 8b 04 25 10 00 00    mov    %gs:0x10,%eax
   7:   00
   8:   64 03 04 25 10 00 00    add    %fs:0x10,%eax
   f:   00
  10:   c3                      retq

The gas issue is reported at [1].

    PR target/81641
    * config/i386/i386.c (ix86_print_operand_address_as): For -masm=intel
    print "ds:" only for immediates in generic address space.

testsuite/ChangeLog:

2017-08-01  Uros Bizjak  <ubiz...@gmail.com>

    PR target/81641
    * gcc.target/i386/pr81641.c: New test.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Patch will be backported to other relevant release branches.

[1] https://sourceware.org/bugzilla/show_bug.cgi?id=21874

Uros.

Index: config/i386/i386.c
===================================================================
--- config/i386/i386.c  (revision 250768)
+++ config/i386/i386.c  (working copy)
@@ -19446,7 +19446,7 @@ ix86_print_operand_address_as (FILE *file, rtx add
       /* Displacement only requires special attention.  */
       if (CONST_INT_P (disp))
        {
-         if (ASSEMBLER_DIALECT == ASM_INTEL && parts.seg == ADDR_SPACE_GENERIC)
+         if (ASSEMBLER_DIALECT == ASM_INTEL && ADDR_SPACE_GENERIC_P (as))
            fputs ("ds:", file);
          fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (disp));
        }
Index: testsuite/gcc.target/i386/pr81641.c
===================================================================
--- testsuite/gcc.target/i386/pr81641.c (nonexistent)
+++ testsuite/gcc.target/i386/pr81641.c (working copy)
@@ -0,0 +1,11 @@
+/* PR target/81641 */
+/* { dg-do assemble } */
+/* { dg-options "-O -masm=intel" } */
+/* { dg-require-effective-target masm_intel } */
+
+int test(void)
+{
+  int __seg_fs *f = (int __seg_fs *)16;
+  int __seg_gs *g = (int __seg_gs *)16;
+  return *f + *g;
+}