On 07/13/2017 02:48 AM, Richard Sandiford wrote: > This patch adds is_a <scalar_int_mode> checks to various places that > were optimising subregs or extractions in ways that only made sense > for scalar integers. Often the subreg transformations were looking > for extends, truncates or shifts and trying to remove the subreg, which > wouldn't be correct if the SUBREG_REG was a vector rather than a scalar. > > The simplify_binary_operation_1 part also removes a redundant: > > GET_MODE (opleft) == GET_MODE (XEXP (opright, 0)) > > since this must be true for: > > (ior A (lshifrt B ...)) A == opleft, B == XEXP (opright, 0) > > 2017-07-13 Richard Sandiford <richard.sandif...@linaro.org> > Alan Hayward <alan.hayw...@arm.com> > David Sherwood <david.sherw...@arm.com> > > gcc/ > * combine.c (find_split_point): Add is_a <scalar_int_mode> checks. > (make_compound_operation_int): Likewise. > (change_zero_ext): Likewise. > * expr.c (convert_move): Likewise. > (convert_modes): Likewise. > * fwprop.c (forward_propagate_subreg): Likewise. > * loop-iv.c (get_biv_step_1): Likewise. > * optabs.c (widen_operand): Likewise. > * postreload.c (move2add_valid_value_p): Likewise. > * recog.c (simplify_while_replacing): Likewise. > * simplify-rtx.c (simplify_unary_operation_1): Likewise. > (simplify_binary_operation_1): Likewise. Remove redundant > mode equality check. > OK. jeff
