Re: [AArch64] Merge stores of D register values of different modes

[Richard Sandiford]

Thanks for doing this, looks good to me FWIW.  I was just wondering:

Jackson Woodruff <jackson.woodr...@foss.arm.com> writes:
> @@ -14712,6 +14712,11 @@ aarch64_operands_ok_for_ldpstp (rtx *operands, bool 
> load,
>    if (!rtx_equal_p (base_1, base_2))
>      return false;
>  
> +  /* Check that the operands are of the same size.  */
> +  if (GET_MODE_SIZE (GET_MODE (mem_1))
> +      != GET_MODE_SIZE (GET_MODE (mem_2)))
> +    return false;
> +
>    offval_1 = INTVAL (offset_1);
>    offval_2 = INTVAL (offset_2);
>    msize = GET_MODE_SIZE (mode);

when can this trigger?  Your iterators always seem to enforce correct
pairings, so maybe this should be an assert instead.

Thanks,
Richard