On Thu, Sep 28, 2017 at 4:05 PM, Shalnov, Sergey <sergey.shal...@intel.com> wrote: > Sorry. The patch is changed as you proposed.
OK for mainline and committed. Thanks, Uros. > -----Original Message----- > From: Uros Bizjak [mailto:ubiz...@gmail.com] > Sent: Thursday, September 28, 2017 3:17 PM > To: Shalnov, Sergey <sergey.shal...@intel.com> > Cc: gcc-patches@gcc.gnu.org; kirill.yuk...@gmail.com; Senkevich, Andrew > <andrew.senkev...@intel.com>; Ivchenko, Alexander > <alexander.ivche...@intel.com>; Peryt, Sebastian <sebastian.pe...@intel.com> > Subject: Re: [PATCH, i386] Avoid 512-bit vector return constant for Intel > AVX512 configuration > > On Thu, Sep 28, 2017 at 3:08 PM, Shalnov, Sergey <sergey.shal...@intel.com> > wrote: >> Hi, >> GCC uses full 512-bit register to return the constant from the function. >> The patch avoid 512-bit register usage if "-mprefer-avx256" option used. >> >> 2017-09-28 Sergey Shalnov <sergey.shal...@intel.com> >> >> gcc/ >> * config/i386/i386.md(*movsf_internal, *movdf_internal): >> Return 256-bit AVX modes for TARGET_PREFER_AVX256. >> >> gcc/testsuite/ >> * gcc.target/i386/avx512f-constant-float-return.c: New test. >> > > - (match_test "TARGET_AVX512F") > + (match_test "TARGET_AVX512F && !TARGET_PREFER_AVX256") > > Please use > > (and (match_test "TARGET_AVX512F) > (not (match_test "TARGET_PREFER_AVX256))) > > Uros.
