Hello Jakub, Uroš,
On 04 Oct 13:41, Uros Bizjak wrote:
> On Wed, Oct 4, 2017 at 10:33 AM, Jakub Jelinek <ja...@redhat.com> wrote:
> > Hi!
> >
> > Most AVX* instructions have the same insn name between VEX and EVEX
> > encoded insns and whether it is EVEX or VEX encoded is determined by
> > the operands by the assembler (if there is masking/broadcast, or
> > %[xy]mm16+ operands are present, or when using 512-bit vectors).
> > This is not the case for the logical instruction, we have VEX
> > encoded VP{AND,OR,XOR,ANDN} and EVEX encoded VP{AND,OR,XOR,ANDN}{D,Q}.
> >
> > Right now we use the d or q suffixes for -mavx512vl even when we could
> > use VEX encoded insn, which results in larger opcode.
> >
> > The following patch fixes that, by emitting the suffix only when needed.
> >
> > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
> >
> > 2017-10-04 Jakub Jelinek <ja...@redhat.com>
> >
> > PR target/82370
> > * config/i386/sse.md (*andnot<mode>3,
> > <mask_codefor><code><mode>3<mask_name>, *<code><mode>3): Split
> > (=v,v,vm) alternative into (=x,x,xm) and (=v,v,vm), for 128-bit
> > and 256-bit vectors, the (=x,x,xm) alternative and when mask is
> > not applied use empty suffix even for TARGET_AVX512VL.
> > * config/i386/subst.md (mask_prefix3, mask_prefix4): When mask
> > is applied, supply evex,evex or evex,evex,evex instead of just
> > evex.
>
> LGTM, but Kirill should give the final approval for this patch.
Patch is OK for main trunk. Thanks!
--
K
