Fix test failures with -mcmodel=tiny when adr is generated instead of adrp.
FAIL: gcc.target/aarch64/sve/peel_ind_1.c -march=armv8.2-a+sve scan-assembler \\tadrp\\tx[0-9]+, x\\n FAIL: gcc.target/aarch64/sve/peel_ind_2.c -march=armv8.2-a+sve scan-assembler \\tadrp\\tx[0-9]+, x\\n FAIL: gcc.target/aarch64/sve/peel_ind_3.c -march=armv8.2-a+sve scan-assembler \\tadrp\\tx[0-9]+, x\\n gcc/testsuite/ChangeLog: 2018-01-24 Szabolcs Nagy <szabolcs.n...@arm.com> * gcc.target/aarch64/sve/peel_ind_1.c: Match (adrp|adr) in scan-assembler. * gcc.target/aarch64/sve/peel_ind_2.c: Likewise. * gcc.target/aarch64/sve/peel_ind_3.c: Likewise.
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_1.c b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_1.c index 864026499cd..a064c337b67 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_1.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_1.c @@ -21,7 +21,7 @@ foo (void) } /* We should operate on aligned vectors. */ -/* { dg-final { scan-assembler {\tadrp\tx[0-9]+, x\n} } } */ +/* { dg-final { scan-assembler {\t(adrp|adr)\tx[0-9]+, x\n} } } */ /* We should use an induction that starts at -5, with only the last 7 elements of the first iteration being active. */ /* { dg-final { scan-assembler {\tindex\tz[0-9]+\.s, #-5, #5\n} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_2.c b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_2.c index 2bfc09a7602..f2113be90a7 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_2.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_2.c @@ -17,6 +17,6 @@ foo (void) } /* We should operate on aligned vectors. */ -/* { dg-final { scan-assembler {\tadrp\tx[0-9]+, x\n} } } */ +/* { dg-final { scan-assembler {\t(adrp|adr)\tx[0-9]+, x\n} } } */ /* We should unroll the loop three times. */ /* { dg-final { scan-assembler-times "\tst1w\t" 3 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_3.c b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_3.c index 8364dc6107a..441589eef60 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_3.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_3.c @@ -17,5 +17,5 @@ foo (int start) } /* We should operate on aligned vectors. */ -/* { dg-final { scan-assembler {\tadrp\tx[0-9]+, x\n} } } */ +/* { dg-final { scan-assembler {\t(adrp|adr)\tx[0-9]+, x\n} } } */ /* { dg-final { scan-assembler {\tubfx\t} } } */