On Fri, Mar 02, 2018 at 10:34:22AM -0700, Jeff Law wrote:
> >>> 2018-02-12 Kyrylo Tkachov <kyrylo.tkac...@arm.com>
> >>>
> >>> PR target/84164
> >>> * simplify-rtx.c (simplify_truncation): Simplify truncation of
> >>> masking
> >>> operation.
> >>> * config/aarch64/aarch64.md (*aarch64_reg_<mode>3_neg_mask2):
> >>> Use simplify_gen_unary creating a SUBREG.
> >>> (*aarch64_reg_<mode>3_minus_mask): Likewise.
> >>> (*aarch64_<optab>_reg_di3_mask2): Use const_int_operand predicate
> >>> for operand 3.
> >>>
> >>> 2018-02-12 Kyrylo Tkachov <kyrylo.tkac...@arm.com>
> >>>
> >>> PR target/84164
> >>> * gcc.c-torture/compile/pr84164.c: New test.
> Sorry. I suspect I dropped this from my inbox when it had the AArch64
> marker -- I didn't realize it had a target independent component.
>
> The simplify-rtx bits are fine. The version in simplify_truncation is
> much better than the original in simplify_subreg (which I think needed
> to verify that you were looking at the lowpart before optimizing).
Isn't that a stage1 material though? I fear given the amount of changes
that needed to be done for it on i386.md that similar amount of work would
be needed on many other targets, especially if they have less extensive
testsuite coverage it might take a while to discover it.
Jakub
