With the code changes in the patch for PR target/85075, I noticed that the PowerPC big-endian build stopped in building big endian, 32-bit libgcc when configured for power8. The issue was this latent bug. Segher asked me to re-submit the bug separately, and I'm doing this for PR target/85424.
This is the patch that I did in PR target/85075. For that set, I did bootstrap builds for big endian power7 and little endian power8 (along with a previous build on a big endian power8 system). This patch will need to be back ported to GCC 7. I suspect that it may not be needed in GCC 6, since that revision used RELOAD instead of LRA. But given it is hard to replicate the bug, I will also back port it to GCC 6. Can I apply this to GCC 8, and after a waiting period, apply it to GCC 7 and GCC 6? 2018-04-15 Michael Meissner <meiss...@linux.vnet.ibm.com> PR target/85424 * config/rs6000/rs6000.md (pack<mode>): Do not try handle a pack where the inputs overlap with the output. -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
Index: gcc/config/rs6000/rs6000.md =================================================================== --- gcc/config/rs6000/rs6000.md (revision 259376) +++ gcc/config/rs6000/rs6000.md (working copy) @@ -13934,16 +13934,14 @@ (define_insn_and_split "unpack<mode>_nod (set_attr "length" "4")]) (define_insn_and_split "pack<mode>" - [(set (match_operand:FMOVE128 0 "register_operand" "=d,&d") + [(set (match_operand:FMOVE128 0 "register_operand" "=&d") (unspec:FMOVE128 - [(match_operand:<FP128_64> 1 "register_operand" "0,d") - (match_operand:<FP128_64> 2 "register_operand" "d,d")] + [(match_operand:<FP128_64> 1 "register_operand" "d") + (match_operand:<FP128_64> 2 "register_operand" "d")] UNSPEC_PACK_128BIT))] "FLOAT128_2REG_P (<MODE>mode)" - "@ - fmr %L0,%2 - #" - "&& reload_completed && REGNO (operands[0]) != REGNO (operands[1])" + "#" + "&& reload_completed" [(set (match_dup 3) (match_dup 1)) (set (match_dup 4) (match_dup 2))] { @@ -13956,8 +13954,8 @@ (define_insn_and_split "pack<mode>" operands[3] = gen_rtx_REG (<FP128_64>mode, dest_hi); operands[4] = gen_rtx_REG (<FP128_64>mode, dest_lo); } - [(set_attr "type" "fpsimple,fp") - (set_attr "length" "4,8")]) + [(set_attr "type" "fp") + (set_attr "length" "8")]) (define_insn "unpack<mode>" [(set (match_operand:DI 0 "register_operand" "=wa,wa")