Hi, See below a patch to address PR 83009.
Tested with aarch64-linux-gnu bootstrap and regtests for c, c++ and fortran.
Ran the adjusted testcase for -mabi=ilp32.
Is this OK for trunk?
Cheers,
Andre
PR target/83009: Relax strict address checking for store pair lanes
The operand constraint for the memory address of store/load pair lanes was
enforcing strictly hardware registers be allowed as memory addresses. We want
to relax that such that these patterns can be used by combine, prior to reload.
During register allocation the register constraint will enforce the correct
register is chosen.
gcc
2018-06-07 Andre Vieira <andre.simoesdiasvie...@arm.com>
PR target/83009
* config/aarch64/predicates.md (aarch64_mem_pair_lanes_operand): Make
address check not strict prior to reload.
gcc/testsuite
2018-06-07 Andre Vieira <andre.simoesdiasvie...@arm.com>
PR target/83009
* gcc/target/aarch64/store_v2vec_lanes.c: Add extra tests.
stp-2.patch
Description: stp-2.patch
