Thanks for your comments, commited as r261538. Paul Hua
On Tue, Jun 12, 2018 at 8:09 PM, Matthew Fortune <mfort...@gmail.com> wrote: > Paul Hua <paul.hua...@gmail.com> writes: >> The gcc.c-torture/execute/scal-to-vec1.c trigger a gcc ICE bug. >> >> It's a mistake in define_expand vec_setv4hi in loongson.md file. >> >> 375 (define_expand "vec_setv4hi" >> 376 [(set (match_operand:V4HI 0 "register_operand" "=f") >> 377 (unspec:V4HI [(match_operand:V4HI 1 "register_operand" "f") >> 378 (match_operand:HI 2 "register_operand" "f") >> 379 (match_operand:SI 3 "const_0_to_3_operand" >> "")] >> 380 UNSPEC_LOONGSON_PINSRH))] >> 381 "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS" >> 382 { >> 383 rtx ext = gen_reg_rtx (SImode); >> 384 emit_move_insn (ext, gen_lowpart (SImode, operands[1])); >> 385 operands[1] = ext; >> 386 }) >> >> The line 384 gen_lowpart the operands[1], should be gen_lowpart >> operands[2], cause the operands[2] are HImode. >> >> >> The attached patch fixed this bug. >> >> Bootstrapped and reg-tested on mips64el-unknown-linux-gnu. >> Ok for commit ? >> >> >> ------------------------------- > > Hi Paul, > > This looks good, just one issue with the changelog entry. The entry > would go in the gcc/ChangeLog file and the path is then relative to > the gcc/ directory. The PR should be referenced as target/<num>: > > 2018-03-24 Chenghua Xu <paul.hua...@gmail.com> > > PR target/86076 > * config/mips/loongson.md (vec_setv4hi): Gen_lowpart for > operands[2] instead of operands[1]. > > OK to commit, thanks for finding and fixing. This has been broken > since 2011! > > Matthew >