On Tue, 26 Jun 2018 at 23:53, James Greenhalgh <james.greenha...@arm.com> wrote: > > On Wed, Jun 20, 2018 at 05:15:37AM -0500, Tamar Christina wrote: > > Hi Kyrill, > > > > Many thanks for the review! > > > > The 06/19/2018 16:47, Kyrill Tkachov wrote: > > > Hi Tamar, > > > > > > On 19/06/18 15:07, Tamar Christina wrote: > > > > Hi All, > > > > > > > > This fixes a regression where we don't have an instruction for pre > > > > Armv8.2-a > > > > to do a move of an fp16 value from a GP reg to a SIMD reg. > > > > > > > > This patch adds that pattern to movhf_aarch64 using a dup and only > > > > selectes it > > > > using a very low priority. > > > > > > > > This fixes an ICE at -O0. > > > > > > > > Regtested on aarch64-none-elf and no issues. > > > > Bootstrapped on aarch64-none-linux-gnu and no issues. > > > > > > > > Ok for master? > > OK, >
Hi, I've noticed that the new test fails: FAIL: gcc.target/aarch64/f16_mov_immediate_3.c scan-assembler-times dup\\tv[0-9]+.4h, w[0-9]+ 1 It might be a matter of old binutils not supporting v8.2, and maybe your test should use an effective target to check that? Thanks, Christophe > Thanks, > James > > > > > > > > > gcc/ > > > > 2018-06-19 Tamar Christina <tamar.christ...@arm.com> > > > > > > > > PR target/85769 > > > > * config/aarch64/aarch64.md (*movhf_aarch64): Add dup v0.4h > > > > pattern. > > > > > > > > gcc/testsuite/ > > > > 2018-06-19 Tamar Christina <tamar.christ...@arm.com> > > > > > > > > PR target/85769 > > > > * gcc.target/aarch64/f16_mov_immediate_3.c: New. > > > > Thanks, > > > > Tamar > > > > > > > > -- > >