On 08/23/2018 04:46 PM, Richard Earnshaw (lists) wrote:
> On 02/08/18 10:46, Martin Liška wrote:
>> On 08/02/2018 11:39 AM, Richard Earnshaw (lists) wrote:
>>> On 18/07/18 16:48, Martin Liška wrote:
>>>> Hi.
>>>>
>>>> This is aarch64 fix for PR83193. It's about setting of default options
>>>> so that --help=target -Q prints proper numbers:
>>>>
>>>> Now this is seen on my cross-compiler:
>>>>
>>>> --- /home/marxin/Downloads/options-2-before.txt 2018-07-18
>>>> 14:53:11.658146543 +0200
>>>> +++ /home/marxin/Downloads/options-2.txt 2018-07-18 14:52:30.113274284
>>>> +0200
>>>> @@ -1,10 +1,10 @@
>>>> The following options are target specific:
>>>> -mabi=ABI lp64
>>>> - -march=ARCH
>>>> + -march= armv8-a
>>>
>>> So we have
>>>
>>> -mabi=ABI lp64
>>>
>>> but
>>>
>>> -march= armv8-a
>>> ^^^^^ blank
>>>
>>> Isn't that inconsistent?
>>
>> It is probably, in this case I would remove 'ABI' from -mabi option. It's
>> explained bellow
>> what are possible options:
>>
>> Known AArch64 ABIs (for use with the -mabi= option):
>> ilp32 lp64
>>
>> Similarly for:
>> -moverride=STRING Power users only! Override CPU optimization
>> parameters.
>> -msve-vector-bits=N Set the number of bits in an SVE vector
>> register to N.
>>
>> It's more common to <var> notation, there are some samples from
>> --help=common:
>>
>> -fmax-errors=<number> Maximum number of errors to report.
>> -fmessage-length=<number> Limit diagnostics to <number> characters per
>> line. 0 suppresses line-wrapping.
>> -fira-region=[one|all|mixed] Set regions for IRA.
>> -fira-verbose=<number> Control IRA's level of diagnostic messages.
>> -flifetime-dse=<0,2> This option lacks documentation.
>> -fstack-limit-register=<register> Trap if the stack goes past <register>.
>> -fstack-limit-symbol=<name> Trap if the stack goes past symbol <name>.
>>
>> Are you fine with the suggested approach?
>
> Yes, those look sensible.
>
> R.
>
>>
>> Martin
>>
>>>
>>> R.
>>>
>>>> -mbig-endian [disabled]
>>>> -mbionic [disabled]
>>>> -mcmodel= small
>>>> - -mcpu=CPU
>>>> + -mcpu= generic
>>>> -mfix-cortex-a53-835769 [enabled]
>>>> -mfix-cortex-a53-843419 [enabled]
>>>> -mgeneral-regs-only [disabled]
>>>> @@ -19,7 +19,7 @@
>>>> -msve-vector-bits=N scalable
>>>> -mtls-dialect= desc
>>>> -mtls-size= 24
>>>> - -mtune=CPU
>>>> + -mtune= generic
>>>> -muclibc [disabled]
>>>>
>>>> May I please ask ARM folks to test the patch?
>>>> Thanks,
>>>> Martin
>>>>
>>>> gcc/ChangeLog:
>>>>
>>>> 2018-07-18 Martin Liska <mli...@suse.cz>
>>>>
>>>> PR driver/83193
>>>> * config/aarch64/aarch64.c (aarch64_override_options_internal):
>>>> Set default values for x_aarch64_*_string strings.
>>>> * config/aarch64/aarch64.opt: Remove --{march,mcpu,mtune}==
>>>> prefix.
>>>> ---
>>>> gcc/config/aarch64/aarch64.c | 7 +++++++
>>>> gcc/config/aarch64/aarch64.opt | 6 +++---
>>>> 2 files changed, 10 insertions(+), 3 deletions(-)
>>>>
>>>>
>>>>
>>>> 0001-Print-default-options-selection-for-march-mcpu-and-m.patch
>>>>
>>>>
>>>> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
>>>> index 6fa03e4b091..d48e6278efa 100644
>>>> --- a/gcc/config/aarch64/aarch64.c
>>>> +++ b/gcc/config/aarch64/aarch64.c
>>>> @@ -10713,6 +10713,13 @@ aarch64_override_options_internal (struct
>>>> gcc_options *opts)
>>>> && opts->x_optimize >=
>>>> aarch64_tune_params.prefetch->default_opt_level)
>>>> opts->x_flag_prefetch_loop_arrays = 1;
>>>>
>>>> + if (opts->x_aarch64_arch_string == NULL)
>>>> + opts->x_aarch64_arch_string = selected_arch->name;
>>>> + if (opts->x_aarch64_cpu_string == NULL)
>>>> + opts->x_aarch64_cpu_string = selected_cpu->name;
>>>> + if (opts->x_aarch64_tune_string == NULL)
>>>> + opts->x_aarch64_tune_string = selected_tune->name;
>>>> +
>>>> aarch64_override_options_after_change_1 (opts);
>>>> }
>>>>
>>>> diff --git a/gcc/config/aarch64/aarch64.opt
>>>> b/gcc/config/aarch64/aarch64.opt
>>>> index 1426b45ff0f..7f0b65de37b 100644
>>>> --- a/gcc/config/aarch64/aarch64.opt
>>>> +++ b/gcc/config/aarch64/aarch64.opt
>>>> @@ -117,15 +117,15 @@ Enum(aarch64_tls_size) String(48) Value(48)
>>>>
>>>> march=
>>>> Target RejectNegative ToLower Joined Var(aarch64_arch_string)
>>>> --march=ARCH Use features of architecture ARCH.
>>>> +Use features of architecture ARCH.
>>>>
>>>> mcpu=
>>>> Target RejectNegative ToLower Joined Var(aarch64_cpu_string)
>>>> --mcpu=CPU Use features of and optimize for CPU.
>>>> +Use features of and optimize for CPU.
>>>>
>>>> mtune=
>>>> Target RejectNegative ToLower Joined Var(aarch64_tune_string)
>>>> --mtune=CPU Optimize for CPU.
>>>> +Optimize for CPU.
>>>>
>>>> mabi=
>>>> Target RejectNegative Joined Enum(aarch64_abi) Var(aarch64_abi)
>>>> Init(AARCH64_ABI_DEFAULT)
>>>>
>>>
>>
>
Good. The final version of the patch will do following diff:
--- /tmp/before.txt 2018-08-24 14:01:24.580625932 +0200
+++ /tmp/after.txt 2018-08-24 14:03:22.383046233 +0200
@@ -1,10 +1,10 @@
The following options are target specific:
- -mabi=ABI Generate code that conforms to the specified ABI.
- -march=ARCH Use features of architecture ARCH.
+ -mabi= Generate code that conforms to the specified ABI.
+ -march= Use features of architecture ARCH.
-mbig-endian Assume target CPU is configured as big endian.
-mbionic Use Bionic C library.
-mcmodel= Specify the code model.
- -mcpu=CPU Use features of and optimize for CPU.
+ -mcpu= Use features of and optimize for CPU.
-mfix-cortex-a53-835769 Workaround for ARM Cortex-A53 Erratum number
835769.
-mfix-cortex-a53-843419 Workaround for ARM Cortex-A53 Erratum number
843419.
-mgeneral-regs-only Generate code which uses only the general
registers.
@@ -15,15 +15,15 @@
-mlow-precision-sqrt Enable the square root approximation. Enabling
this reduces precision of square root results to about 16 bits for single
precision and to 32 bits for double precision. If enabled, it implies
-mlow-precision-recip-sqrt.
-mmusl Use musl C library.
-momit-leaf-frame-pointer Omit the frame pointer in leaf functions.
- -moverride=STRING Power users only! Override CPU optimization
parameters.
+ -moverride=<string> Power users only! Override CPU optimization
parameters.
-mpc-relative-literal-loads PC relative literal loads.
-msign-return-address= Select return address signing scope.
-mstrict-align Don't assume that unaligned accesses are handled
by the system.
- -msve-vector-bits=N Set the number of bits in an SVE vector register
to N.
+ -msve-vector-bits=<number> Set the number of bits in an SVE vector register
to N.
-mtls-dialect= Specify TLS dialect.
-mtls-size= Specifies bit size of immediate TLS offsets.
Valid values are 12, 24, 32, 48.
-mtrack-speculation Generate code to track when the CPU might be
speculating incorrectly.
- -mtune=CPU Optimize for CPU.
+ -mtune= Optimize for CPU.
-muclibc Use uClibc C library.
-mverbose-cost-dump Enables verbose cost model dumping in the debug
dump files.
I take that as agreement and I'm going to install the patch.
Martin
>From af7447117d3086c432c744802c13c544d0c13da9 Mon Sep 17 00:00:00 2001
From: marxin <mli...@suse.cz>
Date: Tue, 20 Feb 2018 12:59:18 +0100
Subject: [PATCH] Print default options selection for -march,-mcpu and -mtune
for aarch64 (PR driver/83193).
gcc/ChangeLog:
2018-07-18 Martin Liska <mli...@suse.cz>
PR driver/83193
* config/aarch64/aarch64.c (aarch64_override_options_internal):
Set default values for x_aarch64_*_string strings.
* config/aarch64/aarch64.opt: Remove --{march,mcpu,mtune}==
prefix. For -mabi do not print '=ABI' in help and use
<option_value> format for -msve-vector-bits and -moverride
options.
---
gcc/config/aarch64/aarch64.c | 7 +++++++
gcc/config/aarch64/aarch64.opt | 12 ++++++------
2 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 5bb30e0c69c..0d7ca999846 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -10557,6 +10557,13 @@ aarch64_override_options_internal (struct gcc_options *opts)
&& opts->x_optimize >= aarch64_tune_params.prefetch->default_opt_level)
opts->x_flag_prefetch_loop_arrays = 1;
+ if (opts->x_aarch64_arch_string == NULL)
+ opts->x_aarch64_arch_string = selected_arch->name;
+ if (opts->x_aarch64_cpu_string == NULL)
+ opts->x_aarch64_cpu_string = selected_cpu->name;
+ if (opts->x_aarch64_tune_string == NULL)
+ opts->x_aarch64_tune_string = selected_tune->name;
+
aarch64_override_options_after_change_1 (opts);
}
diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt
index c8e82042224..b2e80cbf6f1 100644
--- a/gcc/config/aarch64/aarch64.opt
+++ b/gcc/config/aarch64/aarch64.opt
@@ -117,23 +117,23 @@ Enum(aarch64_tls_size) String(48) Value(48)
march=
Target RejectNegative ToLower Joined Var(aarch64_arch_string)
--march=ARCH Use features of architecture ARCH.
+Use features of architecture ARCH.
mcpu=
Target RejectNegative ToLower Joined Var(aarch64_cpu_string)
--mcpu=CPU Use features of and optimize for CPU.
+Use features of and optimize for CPU.
mtune=
Target RejectNegative ToLower Joined Var(aarch64_tune_string)
--mtune=CPU Optimize for CPU.
+Optimize for CPU.
mabi=
Target RejectNegative Joined Enum(aarch64_abi) Var(aarch64_abi) Init(AARCH64_ABI_DEFAULT)
--mabi=ABI Generate code that conforms to the specified ABI.
+Generate code that conforms to the specified ABI.
moverride=
Target RejectNegative ToLower Joined Var(aarch64_override_tune_string)
--moverride=STRING Power users only! Override CPU optimization parameters.
+-moverride=<string> Power users only! Override CPU optimization parameters.
Enum
Name(aarch64_abi) Type(int)
@@ -209,7 +209,7 @@ Enum(sve_vector_bits) String(2048) Value(SVE_2048)
msve-vector-bits=
Target RejectNegative Joined Enum(sve_vector_bits) Var(aarch64_sve_vector_bits) Init(SVE_SCALABLE)
--msve-vector-bits=N Set the number of bits in an SVE vector register to N.
+-msve-vector-bits=<number> Set the number of bits in an SVE vector register to N.
mverbose-cost-dump
Target Undocumented Var(flag_aarch64_verbose_cost)
--
2.18.0
