On 10/2/18 7:17 PM, H.J. Lu wrote:
>> Index: gcc/testsuite/gcc.target/i386/pr49095.c
>> ===================================================================
>> --- gcc/testsuite/gcc.target/i386/pr49095.c (revision 264793)
>> +++ gcc/testsuite/gcc.target/i386/pr49095.c (working copy)
>> @@ -73,4 +73,5 @@ G (long)
>> /* { dg-final { scan-assembler-not "test\[lq\]" } } */
>> /* The {f,h}{char,short,int,long}xor functions aren't optimized into
>> a RMW instruction, so need load, modify and store. FIXME eventually. */
>> -/* { dg-final { scan-assembler-times "\\), %" 8 } } */
>> +/* { dg-final { scan-assembler-times "\\), %" 57 { target { ia32 } } } } */
>> +/* { dg-final { scan-assembler-times "\\), %" 45 { target { lp64 } } } } */
>
> ^^^^^ This is wrong.
>
> It should be not ia32. Otherwise, it will skip x32.
Ok, I changed it, thanks.
Peter
Index: gcc/testsuite/gcc.target/i386/pr49095.c
===================================================================
--- gcc/testsuite/gcc.target/i386/pr49095.c (revision 264793)
+++ gcc/testsuite/gcc.target/i386/pr49095.c (working copy)
@@ -73,4 +73,5 @@ G (long)
/* { dg-final { scan-assembler-not "test\[lq\]" } } */
/* The {f,h}{char,short,int,long}xor functions aren't optimized into
a RMW instruction, so need load, modify and store. FIXME eventually. */
-/* { dg-final { scan-assembler-times "\\), %" 8 } } */
+/* { dg-final { scan-assembler-times "\\), %" 57 { target { ia32 } } } } */
+/* { dg-final { scan-assembler-times "\\), %" 45 { target { ! ia32 } } } } */
