On Tue, Oct 02, 2018 at 11:19:13AM -0500, Richard Henderson wrote:
> The LSE CASP instruction requires values to be placed in even
> register pairs. A solution involving two additional register
> classes was rejected in favor of the much simpler solution of
> simply requiring all TImode values to be aligned.
OK.
Thanks,
James
>
> * config/aarch64/aarch64.c (aarch64_hard_regno_mode_ok): Force
> 16-byte modes held in GP registers to use an even regno.
> ---
> gcc/config/aarch64/aarch64.c | 12 ++++++++----
> 1 file changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
> index 49b47382b5d..ce4d7e51d00 100644
> --- a/gcc/config/aarch64/aarch64.c
> +++ b/gcc/config/aarch64/aarch64.c
> @@ -1451,10 +1451,14 @@ aarch64_hard_regno_mode_ok (unsigned regno,
> machine_mode mode)
> if (regno == FRAME_POINTER_REGNUM || regno == ARG_POINTER_REGNUM)
> return mode == Pmode;
>
> - if (GP_REGNUM_P (regno) && known_le (GET_MODE_SIZE (mode), 16))
> - return true;
> -
> - if (FP_REGNUM_P (regno))
> + if (GP_REGNUM_P (regno))
> + {
> + if (known_le (GET_MODE_SIZE (mode), 8))
> + return true;
> + else if (known_le (GET_MODE_SIZE (mode), 16))
> + return (regno & 1) == 0;
> + }
> + else if (FP_REGNUM_P (regno))
> {
> if (vec_flags & VEC_STRUCT)
> return end_hard_regno (mode, regno) - 1 <= V31_REGNUM;
> --
> 2.17.1
>
