Hi Srinath
On 10/01/19 19:20, Srinath Parvathaneni wrote:
> Hi All,
>
> This patch implements the ACLE hint intrinsics (nop,yield,wfe,wfi,sev
> and sevl), for all ARM targets.
>
> The intrinsics specification will be published on the Arm website [1].
>
> [1]
> http://infocenter.arm.com/help/topic/com.arm.doc.ihi0053c/IHI0053C_acle_2_0.pdf
>
> Bootstrapped on arm-none-linux-gnueabihf, regression tested on
> arm-none-eabi with no regressions and
> ran the added tests for arm, thumb-1 and thumb-2 modes.
>
> Ok for trunk? If ok, could someone commit the patch on my behalf, I
> don't have commit rights.
>
> Thanks,
> Srinath
>
> gcc/ChangeLog:
>
> 2019-01-10 Srinath Parvathaneni <srinath.parvathan...@arm.com>
>
> * config/arm/arm-builtins.c (NOP_QUALIFIERS): New qualifier.
> (arm_expand_builtin_args): New case.
> * config/arm/arm.md (yield): New pattern name.
> (wfe): Likewise.
> (wfi): Likewise.
> (sev): Likewise.
> (sevl): Likewise.
> * config/arm/arm_acle.h (__nop ): New inline function.
> (__yield): Likewise.
> (__sev): Likewise.
> (__sevl): Likewise.
> (__wfi): Likewise.
> (__wfe): Likewise.
> * config/arm/arm_acle_builtins.def (VAR1):
> (nop): New builtin definitions.
> (yield): Likewise.
> (sev): Likewise.
> (sevl): Likewise.
> (wfi): Likewise.
> (wfe): Likewise.
> * config/arm/unspecs.md (unspecv):
> (VUNSPEC_YIELD): New volatile unspec.
> (VUNSPEC_SEV): Likewise.
> (VUNSPEC_SEVL): Likewise.
> (VUNSPEC_WFI): Likewise.
>
> gcc/testsuite/ChangeLog:
>
> 2019-01-10 Srinath Parvathaneni <srinath.parvathan...@arm.com>
>
> * gcc.target/arm/acle/nop.c: New test.
> * gcc.target/arm/acle/sev-1.c: Likewise.
> * gcc.target/arm/acle/sev-2.c: Likewise.
> * gcc.target/arm/acle/sev-3.c: Likewise.
> * gcc.target/arm/acle/sevl-1.c: Likewise.
> * gcc.target/arm/acle/sevl-2.c: Likewise.
> * gcc.target/arm/acle/sevl-3.c: Likewise.
> * gcc.target/arm/acle/wfe-1.c: Likewise.
> * gcc.target/arm/acle/wfe-2.c: Likewise.
> * gcc.target/arm/acle/wfe-3.c: Likewise.
> * gcc.target/arm/acle/wfi-1.c: Likewise.
> * gcc.target/arm/acle/wfi-2.c: Likewise.
> * gcc.target/arm/acle/wfi-3.c: Likewise.
> * gcc.target/arm/acle/yield-1.c: Likewise.
> * gcc.target/arm/acle/yield-2.c: Likewise.
> * gcc.target/arm/acle/yield-3.c: Likewise.
>
Thanks for doing this and I am not a maintainer. I do have a few questions:
...
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index
f6196e9316898e3258e08d8f2ece8fe9640676ca..36b24cfdfa6c61d952a5c704f54d37f2b0fdd34e
100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -8906,6 +8906,76 @@
(set_attr "type" "mov_reg")]
)
+(define_insn "yield"
+ [(unspec_volatile [(const_int 0)] VUNSPEC_YIELD)]
+ ""
+{
+ if (TARGET_ARM)
+ return ".inst\t0xe320f001\t//yield";
+ else if(TARGET_THUMB2)
There should be a space after the if. Likewise for all the other
instructions.
+ return ".inst\t0xf3af8001\t//yield";
+ else /* TARGET_THUMB1 */
+ return ".inst\t0xbf10\t//yield";
+}
+ [(set_attr "type" "coproc")]
Can you please explain the coproc attribute. Also I think maybe you can
use the "length" attribute here. Likewise for all the other instructions.
Finally, for the tests why not combine the tests like the AArch64 patch
where all the intrinsics were tested in the same file with common
testing options? You could have only three new files for all the testing?
Thanks
Sudi
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