This patch, for gcc 8/9 is a mitigation patch for PR target/88469 where
gcc-6/7/8 miscompile a structure whose alignment is dominated by a
64-bit bitfield member. Since the PCS rules for such a type must ignore
any overalignment of the base type we cannot address this by simply
adding a larger alignment to the class. The simplest fix, therefore, is
to insert a dummy field that has 64-bit alignment. Although that field
is never used, it does fix the overall alignment of the class at the
expense of adding an extra dword of data on ARM systems (I've bounded
the range of GCC versions that will lead to this mitigation, so only a
stage-1 gcc-9 will see the impact of this change - though gcc-8 will see
this in full).
OK for trunk/gcc-8?
PR target/88469
* profile-count.h (profile_count): Add dummy file with 64-bit alignment
on arm-based systems using gcc-6/7/8.
diff --git a/gcc/profile-count.h b/gcc/profile-count.h
index c83fa3beb8f..ddfda2cddf4 100644
--- a/gcc/profile-count.h
+++ b/gcc/profile-count.h
@@ -645,6 +645,12 @@ private:
uint64_t m_val : n_bits;
enum profile_quality m_quality : 3;
+#if defined (__arm__) && (__GNUC__ >= 6 && __GNUC__ <= 8)
+ /* Work-around for PR88469. A bug in the gcc-6/7/8 PCS layout code
+ incorrectly detects the alignment of a structure where the only
+ 64-bit aligned element is a bit-field. */
+ uint64_t m_force_alignment;
+#endif
/* Return true if both values can meaningfully appear in single function
body. We have either all counters in function local or global, otherwise
