On Fri, Feb 08, 2019 at 10:18:03AM +0100, Christophe Lyon wrote:
> I'm afaid this patch causes several regressions. Maybe they have
> already been fixed post-commit (I have several validations for later
> commits still running)?
The following patch fixes the single ICE I've tried to reproduce.
While iwmmxt.md movdi pattern uses =m, r and =r, m constraints, both
arm.md and vfp.md movdi patterns use =m, q and =q, m constraints and thus
allow also ip register. The following patch is an attempt to do the same
thing, just in the same patterns through arch_enabled attribute.
Completely untested.
2019-02-08 Jakub Jelinek <ja...@redhat.com>
PR bootstrap/88714
* config/arm/ldrdstrd.md (*arm_ldrd, *arm_strd): Add alternative with
q constraint instead of r, enable it only if not TARGET_REALLY_IWMMXT.
--- gcc/config/arm/ldrdstrd.md.jj 2019-02-07 17:33:38.841669141 +0100
+++ gcc/config/arm/ldrdstrd.md 2019-02-08 10:42:56.515325579 +0100
@@ -157,10 +157,10 @@ (define_peephole2 ; swap the destination
;; We use gen_operands_ldrd_strd() with a modify argument as false so that the
;; operands are not changed.
(define_insn "*arm_ldrd"
- [(parallel [(set (match_operand:SI 0 "s_register_operand" "=r")
- (match_operand:SI 2 "memory_operand" "m"))
- (set (match_operand:SI 1 "s_register_operand" "=r")
- (match_operand:SI 3 "memory_operand" "m"))])]
+ [(parallel [(set (match_operand:SI 0 "s_register_operand" "=q,r")
+ (match_operand:SI 2 "memory_operand" "m,m"))
+ (set (match_operand:SI 1 "s_register_operand" "=q,r")
+ (match_operand:SI 3 "memory_operand" "m,m"))])]
"TARGET_LDRD && TARGET_ARM && reload_completed
&& valid_operands_ldrd_strd (operands, true)"
{
@@ -173,14 +173,17 @@ (define_insn "*arm_ldrd"
(symbol_ref "arm_count_ldrdstrd_insns (operands, true) * 4"))
(set (attr "ce_count") (symbol_ref "get_attr_length (insn) / 4"))
(set_attr "type" "load_8")
- (set_attr "predicable" "yes")]
-)
+ (set_attr "predicable" "yes")
+ (set (attr "arch_enabled")
+ (if_then_else (and (match_test "TARGET_REALLY_IWMMXT")
+ (eq_attr "alternative" "0"))
+ (const_string "no") (const_string "yes")))])
(define_insn "*arm_strd"
- [(parallel [(set (match_operand:SI 2 "memory_operand" "=m")
- (match_operand:SI 0 "s_register_operand" "r"))
- (set (match_operand:SI 3 "memory_operand" "=m")
- (match_operand:SI 1 "s_register_operand" "r"))])]
+ [(parallel [(set (match_operand:SI 2 "memory_operand" "=m,m")
+ (match_operand:SI 0 "s_register_operand" "q,r"))
+ (set (match_operand:SI 3 "memory_operand" "=m,m")
+ (match_operand:SI 1 "s_register_operand" "q,r"))])]
"TARGET_LDRD && TARGET_ARM && reload_completed
&& valid_operands_ldrd_strd (operands, false)"
{
@@ -193,5 +196,8 @@ (define_insn "*arm_strd"
(symbol_ref "arm_count_ldrdstrd_insns (operands, false) * 4"))
(set (attr "ce_count") (symbol_ref "get_attr_length (insn) / 4"))
(set_attr "type" "store_8")
- (set_attr "predicable" "yes")]
-)
+ (set_attr "predicable" "yes")
+ (set (attr "arch_enabled")
+ (if_then_else (and (match_test "TARGET_REALLY_IWMMXT")
+ (eq_attr "alternative" "0"))
+ (const_string "no") (const_string "yes")))])
Jakub
