On Thu, Feb 7, 2019 at 10:11 PM H.J. Lu <hjl.to...@gmail.com> wrote: > > OImode and TImode moves must be done in XImode to access upper 16 > vector registers without AVX512VL. With AVX512VL, we can access > upper 16 vector registers in OImode and TImode. > > PR target/89229 > * config/i386/i386.md (*movoi_internal_avx): Set mode to XI for > upper 16 vector registers without TARGET_AVX512VL. > (*movti_internal): Likewise.
Please use (not (match_test "...")) instead of (match_test "!...") and put the new test as the first argument of the AND rtx. LGTM with the above change. Uros. > --- > gcc/config/i386/i386.md | 10 ++++++---- > 1 file changed, 6 insertions(+), 4 deletions(-) > > diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md > index c1492363bca..e7f4b9a9c8d 100644 > --- a/gcc/config/i386/i386.md > +++ b/gcc/config/i386/i386.md > @@ -1933,8 +1933,9 @@ > (set_attr "type" "sselog1,sselog1,ssemov,ssemov") > (set_attr "prefix" "vex") > (set (attr "mode") > - (cond [(ior (match_operand 0 "ext_sse_reg_operand") > - (match_operand 1 "ext_sse_reg_operand")) > + (cond [(and (ior (match_operand 0 "ext_sse_reg_operand") > + (match_operand 1 "ext_sse_reg_operand")) > + (match_test "!TARGET_AVX512VL")) > (const_string "XI") > (and (eq_attr "alternative" "1") > (match_test "TARGET_AVX512VL")) > @@ -2012,8 +2013,9 @@ > (set (attr "mode") > (cond [(eq_attr "alternative" "0,1") > (const_string "DI") > - (ior (match_operand 0 "ext_sse_reg_operand") > - (match_operand 1 "ext_sse_reg_operand")) > + (and (ior (match_operand 0 "ext_sse_reg_operand") > + (match_operand 1 "ext_sse_reg_operand")) > + (match_test "!TARGET_AVX512VL")) > (const_string "XI") > (and (eq_attr "alternative" "3") > (match_test "TARGET_AVX512VL")) > -- > 2.20.1 >
