> Ok, stand corrected on that, 128-bit indeed, but even that is nothing not
> really used.
The irony is that I'm doing this for 32-bit SPARC (we cannot get ASAN to work
in 64-bit mode for the time being) and the maximum alignment on 32-bit SPARC
is 64-bit (even long doubles) so this will be totally unused. ;-)
> For STRICT_ALIGNMENT targets store merging pass obviously can't do anything
> with those, because unlike asan.c it can't figure out the alignment.
OK, revised patch attached. I have manually verified that it yields the
expected result for an array of long doubles on 64-bit SPARC.
2019-02-12 Eric Botcazou <ebotca...@adacore.com>
* asan.c (asan_expand_mark_ifn): Take into account the alignment of
the object to pick the size of stores on strict-alignment platforms.
--
Eric Botcazou
Index: asan.c
===================================================================
--- asan.c (revision 268508)
+++ asan.c (working copy)
@@ -3218,7 +3218,10 @@ asan_expand_mark_ifn (gimple_stmt_iterat
/* Generate direct emission if size_in_bytes is small. */
if (size_in_bytes <= ASAN_PARAM_USE_AFTER_SCOPE_DIRECT_EMISSION_THRESHOLD)
{
- unsigned HOST_WIDE_INT shadow_size = shadow_mem_size (size_in_bytes);
+ const unsigned HOST_WIDE_INT shadow_size
+ = shadow_mem_size (size_in_bytes);
+ const unsigned int shadow_align
+ = (get_pointer_alignment (base) / BITS_PER_UNIT) >> ASAN_SHADOW_SHIFT;
tree shadow = build_shadow_mem_access (iter, loc, base_addr,
shadow_ptr_types[0], true);
@@ -3226,9 +3229,11 @@ asan_expand_mark_ifn (gimple_stmt_iterat
for (unsigned HOST_WIDE_INT offset = 0; offset < shadow_size;)
{
unsigned size = 1;
- if (shadow_size - offset >= 4)
+ if (shadow_size - offset >= 4
+ && (!STRICT_ALIGNMENT || shadow_align >= 4))
size = 4;
- else if (shadow_size - offset >= 2)
+ else if (shadow_size - offset >= 2
+ && (!STRICT_ALIGNMENT || shadow_align >= 2))
size = 2;
unsigned HOST_WIDE_INT last_chunk_size = 0;