On Mon, Feb 11, 2019 at 12:08:32PM +0100, Jakub Jelinek wrote:
So like the patch below (though, I have only limited possibilities to test
this, can throw it in armv7hl-linux-gnueabi distro build).
Actually, that patch was bad, I misread the CORE_REGS vs. GENERAL_REGS
hardregset difference, it is actually sp that is not GENERAL_REGS but is
CORE_REGS, not ip. So here is an updated patch, same except that in
ldrdstrd.md the q constraints are kept in the right spot.
To repeat, I don't think the q constraints on movdi are now needed, because
ldrdstrd doesn't use those DImode patterns and RA will not allocate a DImode
hard
reg starting at ip because sp is a fixed register.
Bootstrapped/regtested on armv7hl-linux-gnueabi (distro build), ok for
trunk?
2019-02-17 Jakub Jelinek <ja...@redhat.com>
PR bootstrap/88714
* config/arm/arm.md (*arm_movdi, *movdf_soft_insn): Use "r" instead of
"q" constraint.
* config/arm/vfp.md (*movdi_vfp): Likewise.
* config/arm/ldrdstrd.md (*arm_ldrd, *arm_strd): Use "r" instead of
"q" constraint for operands[0].
--- gcc/config/arm/arm.md.jj 2019-01-31 00:26:04.417738975 +0100
+++ gcc/config/arm/arm.md 2019-02-11 12:02:32.778707056 +0100
@@ -5817,8 +5817,8 @@ (define_expand "movdi"
)
(define_insn "*arm_movdi"
- [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, r, q, m")
- (match_operand:DI 1 "di_operand" "rDa,Db,Dc,mi,q"))]
+ [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, r, r, m")
+ (match_operand:DI 1 "di_operand" "rDa,Db,Dc,mi,r"))]
"TARGET_32BIT
&& !(TARGET_HARD_FLOAT)
&& !TARGET_IWMMXT
@@ -7102,8 +7102,8 @@ (define_expand "reload_outdf"
)
(define_insn "*movdf_soft_insn"
- [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=r,r,r,q,m")
- (match_operand:DF 1 "soft_df_operand" "rDa,Db,Dc,mF,q"))]
+ [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=r,r,r,r,m")
+ (match_operand:DF 1 "soft_df_operand" "rDa,Db,Dc,mF,r"))]
"TARGET_32BIT && TARGET_SOFT_FLOAT
&& ( register_operand (operands[0], DFmode)
|| register_operand (operands[1], DFmode))"
--- gcc/config/arm/vfp.md.jj 2019-01-31 00:26:04.312740661 +0100
+++ gcc/config/arm/vfp.md 2019-02-11 12:03:13.232045976 +0100
@@ -307,8 +307,8 @@ (define_insn "*thumb2_movsi_vfp"
;; DImode moves
(define_insn "*movdi_vfp"
- [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,r,r,q,q,m,w,!r,w,w,
Uv")
- (match_operand:DI 1 "di_operand"
"r,rDa,Db,Dc,mi,mi,q,r,w,w,UvTu,w"))]
+ [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,r,r,r,r,m,w,!r,w,w,
Uv")
+ (match_operand:DI 1 "di_operand"
"r,rDa,Db,Dc,mi,mi,r,r,w,w,UvTu,w"))]
"TARGET_32BIT && TARGET_HARD_FLOAT
&& ( register_operand (operands[0], DImode)
|| register_operand (operands[1], DImode))
--- gcc/config/arm/ldrdstrd.md.jj 2019-02-11 11:39:39.977125795 +0100
+++ gcc/config/arm/ldrdstrd.md 2019-02-11 12:03:57.978314745 +0100
@@ -157,7 +157,7 @@
;; We use gen_operands_ldrd_strd() with a modify argument as false so that the
;; operands are not changed.
(define_insn "*arm_ldrd"
- [(parallel [(set (match_operand:SI 0 "s_register_operand" "=q")
+ [(parallel [(set (match_operand:SI 0 "s_register_operand" "=r")
(match_operand:SI 2 "memory_operand" "m"))
(set (match_operand:SI 1 "s_register_operand" "=q")
(match_operand:SI 3 "memory_operand" "m"))])]
@@ -178,7 +178,7 @@
(define_insn "*arm_strd"
[(parallel [(set (match_operand:SI 2 "memory_operand" "=m")
- (match_operand:SI 0 "s_register_operand" "q"))
+ (match_operand:SI 0 "s_register_operand" "r"))
(set (match_operand:SI 3 "memory_operand" "=m")
(match_operand:SI 1 "s_register_operand" "q"))])]
"TARGET_LDRD && TARGET_ARM && reload_completed
Jakub
