Hi,

Some of the narrowing/widening FP converts were missing from SVE. I fixed most
of them, so they can be vectorized. The ones missing are int64->fp16 and
fp16->int64.

I extended the tests to cover the cases that were missing.

I validated the patch with self-checking and running the new SVE tests on an
SVE emulator.

Alejandro


gcc/Changelog:

2019-02-25  Alejandro Martinez  <alejandro.martinezvice...@arm.com>

        * config/aarch64/aarch64-sve.md
        (aarch64_sve_<fix_trunc_optab>_vnx8hf<mode>2,
        aarch64_sve_<fix_trunc_optab>_vnx4sf<mode>2): Renamed FP to int
        patterns.
        (vec_unpack_<su>fix_trunc_<perm_hilo>_<mode>,
        vec_pack<su_optab>_float_<VwideInt>): New unpack/pack expanders.
        * config/aarch64/iterators.md (SVE_HSDI): Fix cut-&-paste of SVE_BHSI.
        (VWIDEINT): New iterator.
        (VwideInt): Likewise.


gcc/testsuite/Changelog:
 
2019-02-25  Alejandro Martinez  <alejandro.martinezvice...@arm.com>

        * gcc.target/aarch64/sve/fcvt_1.c: New test for fp to fp convert.
        * gcc.target/aarch64/sve/fcvt_1_run.c: Likewise.
        * gcc.target/aarch64/sve/cvtf_signed_1.c Improved test to cover
        widening and narrowing cases.
        * gcc.target/aarch64/sve/cvtf_signed_1_run.c: Likewise.
        * gcc.target/aarch64/sve/cvtf_unsigned_1.c: Likewise.
        * gcc.target/aarch64/sve/cvtf_unsigned_1_run.c: Likewise.
        * gcc.target/aarch64/sve/fcvtz_signed_1.c: Likewise.
        * gcc.target/aarch64/sve/fcvtz_signed_1_run.c: Likewise.
        * gcc.target/aarch64/sve/fcvtz_unsigned_1.c: Likewise.
        * gcc.target/aarch64/sve/fcvtz_unsigned_1_run.c: Likewise.

Attachment: cvt_v4.patch
Description: cvt_v4.patch

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