Hi!

On the gcc.dg/vect/pr88598-3.c testcase, gen_vec_extract... is called with
operands[1] that is already a subreg - (subreg:V4SF (reg:V4SI 201 [ _31 ]) 0)
and wraps it in another SUBREG, which is invalid in RTL.

In all the following 4 spots I've verified that the operand's mode is some
128-bit vector mode and the mode we want to use is another 128-bit vector
mode, so we are just VCEing the operand to another same sized mode, so we can
call gen_lowpart to handle everything for us (there are no worries about big
vs. little endian etc.).

Paul Hua has kindly bootstrapped/regtested this on mips (mentioned in the
PR), ok for trunk?

2019-03-14  Jakub Jelinek  <ja...@redhat.com>

        PR target/89378
        * config/mips/mips.c (mips_expand_vec_cond_expr): Use gen_lowpart
        instead of gen_rtx_SUBREG.
        * config/mips/mips-msa.md (vec_extract<mode><unitmode>): Likewise.

--- gcc/config/mips/mips.c.jj   2019-03-11 22:57:00.113599336 +0100
+++ gcc/config/mips/mips.c      2019-03-13 15:46:53.597014213 +0100
@@ -22265,7 +22265,7 @@ mips_expand_vec_cond_expr (machine_mode
          if (mode != vimode)
            {
              xop1 = gen_reg_rtx (vimode);
-             emit_move_insn (xop1, gen_rtx_SUBREG (vimode, operands[1], 0));
+             emit_move_insn (xop1, gen_lowpart (vimode, operands[1]));
            }
          emit_move_insn (src1, xop1);
        }
@@ -22282,7 +22282,7 @@ mips_expand_vec_cond_expr (machine_mode
          if (mode != vimode)
            {
              xop2 = gen_reg_rtx (vimode);
-             emit_move_insn (xop2, gen_rtx_SUBREG (vimode, operands[2], 0));
+             emit_move_insn (xop2, gen_lowpart (vimode, operands[2]));
            }
          emit_move_insn (src2, xop2);
        }
--- gcc/config/mips/mips-msa.md.jj      2019-01-01 12:37:22.657884713 +0100
+++ gcc/config/mips/mips-msa.md 2019-03-13 15:45:01.442789417 +0100
@@ -346,12 +346,12 @@ (define_expand "vec_extract<mode><unitmo
         operands[2] accordingly.  */
       rtx wd = gen_reg_rtx (V16QImode);
       rtx ws = gen_reg_rtx (V16QImode);
-      emit_move_insn (ws, gen_rtx_SUBREG (V16QImode, operands[1], 0));
+      emit_move_insn (ws, gen_lowpart (V16QImode, operands[1]));
       rtx n = GEN_INT (val * GET_MODE_SIZE (<UNITMODE>mode));
       gcc_assert (INTVAL (n) < GET_MODE_NUNITS (V16QImode));
       emit_insn (gen_msa_sldi_b (wd, ws, ws, n));
       temp = gen_reg_rtx (<MODE>mode);
-      emit_move_insn (temp, gen_rtx_SUBREG (<MODE>mode, wd, 0));
+      emit_move_insn (temp, gen_lowpart (<MODE>mode, wd));
     }
   emit_insn (gen_msa_vec_extract_<msafmt_f> (operands[0], temp));
   DONE;

        Jakub

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