On 6/6/19 1:42 AM, Claudiu Zissulescu wrote:
> When optimizing for size, try to avoid using long immediate by
> employing alternative (short) instructions.
> 
> Ok to apply?
> Claudiu
> 
> gcc/
> xxxx-xx-xx  Claudiu Zissulescu  <claz...@synopsys.com>
> 
>       * config/arc/arc-protos.h (arc_check_ior_const): Declare.
>       (arc_split_ior): Likewise.
>       (arc_check_mov_const): Likewise.
>       (arc_split_mov_const): Likewise.
>       * config/arc/arc.c (arc_print_operand): Fix 'z' letter.
>       (arc_rtx_costs): Replace check Crr with Cax constraint.
>       (prepare_move_operands): Cleanup, remove unused code.
>       (arc_split_ior): New function.
>       (arc_check_ior_const): Likewise.
>       (arc_split_mov_const): Likewise.
>       (arc_check_mov_const): Likewise.
>       * config/arc/arc.md (movsi_insn): Restructure it, and convert it
>       in define_insn_and_split pattern.
>       (iorsi3): Likewise.
>       (mulsi3_v2): Add new matching variant.
>       (andsi3_i): Cleanup pattern.
>       (rotrsi3_cnt1): Update pattern.
>       (rotrsi3_cnt8): New pattern.
>       (ashlsi2_cnt8): Likewise.
>       (ashlsi2_cnt16): Likewise.
>       * config/arc/constraints.md (C0p): Update constraint.
>       (Crr): Remove it.
>       (C0x): New pattern.
>       (Cax): New pattern.
> 
> testsuite/
> xxxx-xx-xx  Claudiu Zissulescu  <claz...@synopsys.com>
> 
>       * gcc.target/arc/and-cnst-size.c: New test.
>       * gcc.target/arc/mov-cnst-size.c: Likewise.
>       * gcc.target/arc/or-cnst-size.c: Likewise.
>       * gcc.target/arc/store-merge-1.c: Update test.
>       * gcc.target/arc/arc700-stld-hazard.c: Likewise.
>       * gcc.target/arc/cmem-1.c: Likewise.
>       * gcc.target/arc/cmem-2.c: Likewise.
>       * gcc.target/arc/cmem-3.c: Likewise.
>       * gcc.target/arc/cmem-4.c: Likewise.
>       * gcc.target/arc/cmem-5.c: Likewise.
>       * gcc.target/arc/cmem-6.c: Likewise.
>       * gcc.target/arc/loop-4.c: Likewise.
>       * gcc.target/arc/movh_cl-1.c: Likewise.
>       * gcc.target/arc/sdata-3.c: Likewise.
> ---
> 
> diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
> index b49f2539408..f398c4a0086 100644
> --- a/gcc/config/arc/arc.c
> +++ b/gcc/config/arc/arc.c
> @@ -11457,6 +11429,198 @@ arc_memory_move_cost (machine_mode mode,
>    return (2 * GET_MODE_SIZE (mode));
>  }
>  
> +/* Split an OR instruction into multiple BSET/OR instructions in a
> +   tentative to avoid long immediate constants.  The next strategies
> +   are employed when destination is 'q' reg.
s/tentative/attempt/ ?

> +
> +   1. if there are up to three bits set in the mask, a succesion of
s/succesion/succession/

OK with the nits fixed.

jeff

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