Some of my future patches for prefixed memory instructions in a future PowerPC
processor need the following tweak to the ISA attribute, so that the
alternative that uses a prefixed instruction to load up large integer constants
can be eliminated if the user does not compile for the 'future' target.
I have bootstrapped the compiler and run make check with no regressions. Can I
check this into the trunk?
2019-06-17 Michael Meissner <meiss...@linux.ibm.com>
* config/rs6000/rs6000.md (isa attribute): Add support for
prefixed instructions.
Index: gcc/config/rs6000/rs6000.md
===================================================================
--- gcc/config/rs6000/rs6000.md (revision 272270)
+++ gcc/config/rs6000/rs6000.md (working copy)
@@ -267,7 +267,9 @@ (define_attr "cpu"
(const (symbol_ref "(enum attr_cpu) rs6000_tune")))
;; The ISA we implement.
-(define_attr "isa" "any,p5,p6,p7,p7v,p8v,p9v,p9kf,p9tf" (const_string "any"))
+(define_attr "isa"
+ "any,p5,p6,p7,p7v,p8v,p9v,p9kf,p9tf,prefix"
+ (const_string "any"))
;; Is this alternative enabled for the current CPU/ISA/etc.?
(define_attr "enabled" ""
@@ -306,6 +308,10 @@ (define_attr "enabled" ""
(and (eq_attr "isa" "p9tf")
(match_test "FLOAT128_VECTOR_P (TFmode)"))
(const_int 1)
+
+ (and (eq_attr "isa" "prefix")
+ (match_test "TARGET_PREFIXED_ADDR"))
+ (const_int 1)
] (const_int 0)))
;; If this instruction is microcoded on the CELL processor
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.ibm.com, phone: +1 (978) 899-4797
