On 8/14/19 6:27 AM, Richard Sandiford wrote:
> This patch adds support for IFN_COND shifts left and shifts right.
> This is mostly mechanical, but since we try to handle conditional
> operations in the same way as unconditional operations in match.pd,
> we need to support IFN_COND shifts by scalars as well as vectors.
> E.g.:
>
> IFN_COND_SHL (cond, a, { 1, 1, ... }, fallback)
>
> and:
>
> IFN_COND_SHL (cond, a, 1, fallback)
>
> are the same operation, with:
>
> (for shiftrotate (lrotate rrotate lshift rshift)
> ...
> /* Prefer vector1 << scalar to vector1 << vector2
> if vector2 is uniform. */
> (for vec (VECTOR_CST CONSTRUCTOR)
> (simplify
> (shiftrotate @0 vec@1)
> (with { tree tem = uniform_vector_p (@1); }
> (if (tem)
> (shiftrotate @0 { tem; }))))))
>
> preferring the latter. The patch copes with this by extending
> create_convert_operand_from to handle scalar-to-vector conversions.
>
> Tested on aarch64-linux-gnu (with and without SVE), aarch64_be-elf
> and x86_64-linux-gnu. OK for the generic bits?
>
> Richard
>
>
> 2019-08-14 Richard Sandiford <richard.sandif...@arm.com>
> Prathamesh Kulkarni <prathamesh.kulka...@linaro.org>
>
> gcc/
> * internal-fn.def (IFN_COND_SHL, IFN_COND_SHR): New internal functions.
> * internal-fn.c (FOR_EACH_CODE_MAPPING): Handle shifts.
> * match.pd (UNCOND_BINARY, COND_BINARY): Likewise.
> * optabs.def (cond_ashl_optab, cond_ashr_optab, cond_lshr_optab): New
> optabs.
> * optabs.h (create_convert_operand_from): Expand comment.
> * optabs.c (maybe_legitimize_operand): Allow implicit broadcasts
> when mapping scalar rtxes to vector operands.
> * config/aarch64/iterators.md (SVE_INT_BINARY): Add ashift,
> ashiftrt and lshiftrt.
> (sve_int_op, sve_int_op_rev, sve_pred_int_rhs2_operand): Handle them.
> * config/aarch64/aarch64-sve.md (*cond_<optab><mode>_2_const)
> (*cond_<optab><mode>_any_const): New patterns.
>
> gcc/testsuite/
> * gcc.target/aarch64/sve/cond_shift_1.c: New test.
> * gcc.target/aarch64/sve/cond_shift_1_run.c: Likewise.
> * gcc.target/aarch64/sve/cond_shift_2.c: Likewise.
> * gcc.target/aarch64/sve/cond_shift_2_run.c: Likewise.
> * gcc.target/aarch64/sve/cond_shift_3.c: Likewise.
> * gcc.target/aarch64/sve/cond_shift_3_run.c: Likewise.
> * gcc.target/aarch64/sve/cond_shift_4.c: Likewise.
> * gcc.target/aarch64/sve/cond_shift_4_run.c: Likewise.
> * gcc.target/aarch64/sve/cond_shift_5.c: Likewise.
> * gcc.target/aarch64/sve/cond_shift_5_run.c: Likewise.
> * gcc.target/aarch64/sve/cond_shift_6.c: Likewise.
> * gcc.target/aarch64/sve/cond_shift_6_run.c: Likewise.
> * gcc.target/aarch64/sve/cond_shift_7.c: Likewise.
> * gcc.target/aarch64/sve/cond_shift_7_run.c: Likewise.
> * gcc.target/aarch64/sve/cond_shift_8.c: Likewise.
> * gcc.target/aarch64/sve/cond_shift_8_run.c: Likewise.
> * gcc.target/aarch64/sve/cond_shift_9.c: Likewise.
> * gcc.target/aarch64/sve/cond_shift_9_run.c: Likewise.
Generic bits OK.
jeff