On 9/5/19 10:35 AM, Wilco Dijkstra wrote: > Agreed. I've got a couple of general comments: > > * The option name -matomic-ool sounds too abbreviated. I think eg. > -moutline-atomics is more descriptive and user friendlier.
Changed. > * Similarly the exported __aa64_have_atomics variable could be named > __aarch64_have_lse_atomics so it's clear that it is about LSE atomics. Changed. > +@item -matomic-ool > +@itemx -mno-atomic-ool > +Enable or disable calls to out-of-line helpers to implement atomic > operations. > +These helpers will, at runtime, determine if ARMv8.1-Atomics instructions > +should be used; if not, they will use the load/store-exclusive instructions > +that are present in the base ARMv8.0 ISA. > + > +This option is only applicable when compiling for the base ARMv8.0 > +instruction set. If using a later revision, e.g. @option{-march=armv8.1-a} > +or @option{-march=armv8-a+lse}, the ARMv8.1-Atomics instructions will be > +used directly. > > So what is the behaviour when you explicitly select a specific CPU? Selecting a specific cpu selects the specific architecture that the cpu supports, does it not? Thus the architecture example above still applies. Unless I don't understand what distinction that you're making? > +/* Branch to LABEL if LSE is enabled. > + The branch should be easily predicted, in that it will, after > constructors, > + always branch the same way. The expectation is that systems that > implement > + ARMv8.1-Atomics are "beefier" than those that omit the extension. > + By arranging for the fall-through path to use load-store-exclusive insns, > + we aid the branch predictor of the smallest cpus. */ > > I'd say that by the time GCC10 is released and used in distros, systems > without > LSE atomics would be practically non-existent. So we should favour LSE atomics > by default. I suppose. Does it not continue to be true that an a53 is more impacted by the branch prediction than an a76? r~