On Fri, Oct 25, 2019 at 9:20 PM Hongtao Liu <crazy...@gmail.com> wrote:
>
> > Looking into sse.md, there is a lot of inconsistencies in existing *vm
> > patterns w.r.t. operand constraints. Unfortunately, these were copied
> > into proposed patterns. One example is existing
> >
> > (define_insn "<sse>_vmsqrt<mode>2<mask_scalar_name><round_scalar_name>"
> > [(set (match_operand:VF_128 0 "register_operand" "=x,v")
> > (vec_merge:VF_128
> > (sqrt:VF_128
> > (match_operand:VF_128 1 "vector_operand"
> > "xBm,<round_scalar_constraint>"))
> > (match_operand:VF_128 2 "register_operand" "0,v")
> > (const_int 1)))]
> > "TARGET_SSE"
> > "@
> > sqrt<ssescalarmodesuffix>\t{%1, %0|%0, %<iptr>1}
> >
> > Due to combine benefits, *vm operands to be merged is described in
> > vector mode. Since the insn operates in scalar mode, there is no need
> > for "vector_operand" and Bm constraint that impose more strict
> > alignment requirements. However, iptr modifier is needed here to
> > override VF_128 vector mode (e.g. V4SFmode) to generate scalar
> > (SFmode, DWORD PTR) memory access prefix.
> >
> > Someone should fix these existing inconsistencies in a follow-up patch.
>
> https://gcc.gnu.org/ml/gcc-patches/2019-10/msg01867.html
> This patch is to fix these.
>
> Bootstrap and regression test on i386/x86-64 is ok.
>
> Ok for trunk?
>
> Changelog
>
> cc/
> * config/i386/sse.md
> (<sse>_vm<plusminus_insn><mode>3<mask_scalar_name><round_scalar_name>,
>
> <sse>_vm<multdiv_mnemonic><mode>3<mask_scalar_name><round_scalar_name>,
> <sse>_vmsqrt<mode>2<mask_scalar_name><round_scalar_name>,
> <sse>_vm<code><mode>3<mask_scalar_name><round_saeonly_scalar_name>,
> <sse>_vmmaskcmp<mode>3):
> Change predicates from vector_operand to nonimmediate_operand,
> constraints xBm to xm, since scalar operations don't need
> memory address alignment.
> (avx512f_vmcmp<mode>3<round_saeonly_name>,
> avx512f_vmcmp<mode>3_mask<round_saeonly_name>): Replace
> round_saeonly_nimm_predicate with
> round_saeonly_nimm_scalar_predicate.
> (fmai_vmfmadd_<mode><round_name>, fmai_vmfmsub_<mode><round_name>,
> fmai_vmfnmadd_<mode><round_name>,fmai_vmfnmsub_<mode><round_name>,
> *fmai_fmadd_<mode>, *fmai_fmsub_<mode>,
> *fmai_fnmadd_<mode><round_name>, *fmai_fnmsub_<mode><round_name>,
> avx512f_vmfmadd_<mode>_mask3<round_name>,
> avx512f_vmfmadd_<mode>_maskz_1<round_name>,
> *avx512f_vmfmsub_<mode>_mask<round_name>,
> avx512f_vmfmsub_<mode>_mask3<round_name>,
> *avx512f_vmfmsub_<mode>_maskz_1<round_name>,
> *avx512f_vmfnmadd_<mode>_mask<round_name>,
> *avx512f_vmfnmadd_<mode>_mask3<round_name>,
> *avx512f_vmfnmadd_<mode>_maskz_1<round_name>,
> *avx512f_vmfnmsub_<mode>_mask<round_name>,
> *avx512f_vmfnmsub_<mode>_mask3<round_name>,
> *avx512f_vmfnmsub_<mode>_maskz_1<round_name>,
> cvtusi2<ssescalarmodesuffix>32<round_name>,
> cvtusi2<ssescalarmodesuffix>64<round_name>, ): Replace
> round_nimm_predicate instead of round_nimm_scalr_predicate.
> (avx512f_sfixupimm<mode><sd_maskz_name><round_saeonly_name>,
> avx512f_sfixupimm<mode>_mask<round_saeonly_name>,
> avx512er_vmrcp28<mode><round_saeonly_name>,
> avx512er_vmrsqrt28<mode><round_saeonly_name>,
> ): Replace round_saeonly_nimm_predicate with
> round_saeonly_nimm_scalar_predicate.
> (avx512dq_vmfpclass<mode><mask_scalar_merge_name>, ): Replace
> vector_operand with nonimmediate_operand.
> * config/i386/subst.md (round_scalar_nimm_predicate,
> round_saeonly_scalar_nimm_predicate): Replace
> vector_operand with nonimmediate_operand.
LGTM, although this patch is very hard to review.
BTW: Please also note that there is no need to use <iptr> or operand
mode override in scalar insn templates for intel asm dialect when
operand already has a scalar mode.
Thanks,
Uros.
