Hi Segher,
Update the code as you wish, Thanks:

P9LE generated instruction is not worse than P8LE.
mtvsrdd;xxlnot;stxv vs. not;not;std;std.
Update the test case to fix failures.

v4:
Define and use check_effective_target_xxx etc.
power9+: power9, power10 ...
power8: power8 only.

gcc/testsuite/ChangeLog:

        2019-11-22  Luo Xiong Hu  <luo...@linux.ibm.com>

        testsuite/pr92398
        * gcc.target/powerpc/pr72804.c: Split the store function to...
        * gcc.target/powerpc/pr72804-1.c: ... this one.  New.
        * lib/target-supports.exp (check_effective_target_power8): New.
        (check_effective_target_power9+): New.
---
 gcc/testsuite/gcc.target/powerpc/pr72804-1.c | 23 ++++++++++++++++++++
 gcc/testsuite/gcc.target/powerpc/pr72804.c   | 19 ++++------------
 gcc/testsuite/lib/target-supports.exp        | 20 +++++++++++++++++
 3 files changed, 47 insertions(+), 15 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/pr72804-1.c

diff --git a/gcc/testsuite/gcc.target/powerpc/pr72804-1.c 
b/gcc/testsuite/gcc.target/powerpc/pr72804-1.c
new file mode 100644
index 00000000000..fce08079bd3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr72804-1.c
@@ -0,0 +1,23 @@
+/* { dg-do compile { target { lp64 } } } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-O2 -mvsx" } */
+
+void
+bar (__int128_t *dst, __int128_t src)
+{
+  *dst =  ~src;
+}
+
+/* store generates difference instructions as below:
+   P9: mtvsrdd;xxlnot;stxv.
+   P8/P7/P6 LE: not;not;std;std.
+   P8 BE: mtvsrd;mtvsrd;xxpermdi;xxlnor;stxvd2x.
+   P7/P6 BE: std;std;addi;lxvd2x;xxlnor;stxvd2x.  */
+
+/* { dg-final { scan-assembler-times {\mmtvsrdd\M} 1 { target power9+ } } } */
+/* { dg-final { scan-assembler-times {\mxxlnor\M} 1 { target power9+ } } } */
+/* { dg-final { scan-assembler-times {\mstxv\M} 1 { target power9+ } } } */
+
+/* { dg-final { scan-assembler-times {\mnot\M} 2 { xfail {! { {! power9+} && 
{le} } } } } } */
+
+/* { dg-final { scan-assembler-times {\mstd\M} 2 { xfail { { {power8} && {be} 
} || {power9+} } } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pr72804.c 
b/gcc/testsuite/gcc.target/powerpc/pr72804.c
index 10e37caed6b..0b083a44ede 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr72804.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr72804.c
@@ -1,7 +1,6 @@
 /* { dg-do compile { target { lp64 } } } */
-/* { dg-skip-if "" { powerpc*-*-darwin* } } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-O2 -mvsx -fno-inline-functions --param 
max-inline-insns-single-O2=200" } */
+/* { dg-options "-O2 -mvsx" } */
 
 __int128_t
 foo (__int128_t *src)
@@ -9,17 +8,7 @@ foo (__int128_t *src)
   return ~*src;
 }
 
-void
-bar (__int128_t *dst, __int128_t src)
-{
-  *dst =  ~src;
-}
 
-/* { dg-final { scan-assembler-times "not " 4 } } */
-/* { dg-final { scan-assembler-times "std " 2 } } */
-/* { dg-final { scan-assembler-times "ld " 2 } } */
-/* { dg-final { scan-assembler-not "lxvd2x" } } */
-/* { dg-final { scan-assembler-not "stxvd2x" } } */
-/* { dg-final { scan-assembler-not "xxpermdi" } } */
-/* { dg-final { scan-assembler-not "mfvsrd" } } */
-/* { dg-final { scan-assembler-not "mfvsrd" } } */
+/* { dg-final { scan-assembler-times {\mld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mnot\M} 2 } } */
+/* { dg-final { scan-assembler-not {\mlxvd2x\M} } }*/
diff --git a/gcc/testsuite/lib/target-supports.exp 
b/gcc/testsuite/lib/target-supports.exp
index 751045d4744..d2e54c57e96 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2585,6 +2585,26 @@ proc check_effective_target_le { } {
     }]
 }
 
+# Return 1 if we're generating code for only power8 platforms.
+
+proc check_effective_target_power8 {  } {
+  return [check_no_compiler_messages_nocache power8 assembly {
+       #if !(!defined(_ARCH_PWR9) && defined(_ARCH_PWR8))
+       #error NO
+       #endif
+  } ""]
+}
+
+# Return 1 if we're generating code for power9 and future platforms.
+
+proc check_effective_target_power9+ {  } {
+  return [check_no_compiler_messages_nocache power9+ assembly {
+       #if !(defined(_ARCH_PWR9))
+       #error NO
+       #endif
+  } ""]
+}
+
 # Return 1 if we're generating 32-bit code using default options, 0
 # otherwise.
 
-- 
2.21.0.777.g83232e3864

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