On 12/06/2011 01:42 PM, Andrew Stubbs wrote: > On Tue 06 Dec 2011 21:05:30 GMT, Richard Henderson wrote: >> On 12/06/2011 09:59 AM, Andrew Stubbs wrote: >>> +(define_insn "*one_cmpldi2_neon" >>> + [(set (match_operand:DI 0 "s_register_operand" "=w,?&r,?&r,?w") >>> + (not:DI (match_operand:DI 1 "s_register_operand" " w, 0, r, w")))] >> >> alternative 0 == alternative 3? > > Yes and no. This is an idiom used in several places in neon.md. They > are the same, but only one or other is enabled at the same time (see > the "arch" attribute) so while both 'w' and 'r' options are always > available, the order of preference is different.
Except that without *, I don't think this is what is actually achieved. Perhaps I'm mistaken about how register preferencing is handled in the current state of the register allocator... r~