Re: [PATCH] Enable mask operation for 128/256-bit vector VCOND_EXPR under avx512f (PR92686)

[Jakub Jelinek]

On Thu, Dec 05, 2019 at 09:56:46AM +0800, Hongtao Liu wrote:
> --- a/gcc/config/i386/i386-expand.c
> +++ b/gcc/config/i386/i386-expand.c
> +      /* Using vector move with mask register.  */
> +      cmp = force_reg (cmpmode, cmp);
> +      /* Optimize for mask zero.  */
> +      op_true =
> +     op_true != CONST0_RTX (mode) ? force_reg (mode, op_true) : op_true;
> +      op_false =
> +     op_false != CONST0_RTX (mode) ? force_reg (mode, op_false) : op_false;

The above two still aren't correct, = doesn't belong at the end of line
either.

      op_true
        = op_true != CONST0_RTX (mode) ? force_reg (mode, op_true) : op_true;

would be ok,

      op_false
        = op_false != CONST0_RTX (mode) ? force_reg (mode, op_false) : op_false;

is too long, so e.g.

      op_false = (op_false != CONST0_RTX (mode)
                  ? force_reg (mode, op_false) : op_false);

> +       /* Reverse op_true op_false.  */
> +       n = op_true;
> +       op_true = op_false;
> +       op_false = n;

Please use
          std::swap (op_true, op_false);
instead of the above 3 lines.

Also, can you please add at least one testcase for this with -masm=intel,
effective target masm_intel and dg-do assemble to make sure it assembles?
Perhaps just one -mavx512vl -mavx512bw avx512vl/avx512bw effective target that 
tests all the patterns?

Ok with those changes.

        Jakub