Dennis Zhang <dennis.zh...@arm.com> writes: > Hi Richard, > > On 06/12/2019 10:22, Richard Sandiford wrote: >> Dennis Zhang <dennis.zh...@arm.com> writes: >>> 2019-12-04 Dennis Zhang <dennis.zh...@arm.com> >>> >>> * config/aarch64/aarch64-arches.def (armv8.6-a): New. >>> * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define >>> __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC and >>> __ARM_FEATURE_BF16_SCALAR_ARITHMETIC when enabled. >>> * config/aarch64/aarch64-option-extensions.def (i8mm, bf16): New. >>> (fp): Disabling fp also disables i8mm and bf16. >>> (simd): Disabling simd also disables i8mm. >>> * config/aarch64/aarch64.h (AARCH64_FL_V8_6): New macro. >>> (AARCH64_FL_I8MM, AARCH64_FL_BF16, AARCH64_FL_FOR_ARCH8_6): Likewise. >>> (AARCH64_ISA_V8_6, AARCH64_ISA_I8MM, AARCH64_ISA_BF16): Likewise. >>> (TARGET_I8MM, TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise. >>> * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options. Add >>> a new table to list permissible values for ARCH. >>> >>> gcc/testsuite/ChangeLog: >>> >>> 2019-12-04 Dennis Zhang <dennis.zh...@arm.com> >>> >>> * gcc.target/aarch64/pragma_cpp_predefs_2.c: Add tests for i8mm >>> and bf16 features. >> >> Thanks for the update, looks great. A couple of comments below. >> >>> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi >>> index d165f31a865..1192e8f4b06 100644 >>> --- a/gcc/doc/invoke.texi >>> +++ b/gcc/doc/invoke.texi >>> @@ -16050,25 +16050,22 @@ Specify the name of the target architecture and, >>> optionally, one or >>> more feature modifiers. This option has the form >>> @option{-march=@var{arch}@r{@{}+@r{[}no@r{]}@var{feature}@r{@}*}}. >>> >>> -The permissible values for @var{arch} are @samp{armv8-a}, >>> -@samp{armv8.1-a}, @samp{armv8.2-a}, @samp{armv8.3-a}, @samp{armv8.4-a}, >>> -@samp{armv8.5-a} or @var{native}. >>> - >>> -The value @samp{armv8.5-a} implies @samp{armv8.4-a} and enables compiler >>> -support for the ARMv8.5-A architecture extensions. >>> - >>> -The value @samp{armv8.4-a} implies @samp{armv8.3-a} and enables compiler >>> -support for the ARMv8.4-A architecture extensions. >>> - >>> -The value @samp{armv8.3-a} implies @samp{armv8.2-a} and enables compiler >>> -support for the ARMv8.3-A architecture extensions. >>> - >>> -The value @samp{armv8.2-a} implies @samp{armv8.1-a} and enables compiler >>> -support for the ARMv8.2-A architecture extensions. >>> - >>> -The value @samp{armv8.1-a} implies @samp{armv8-a} and enables compiler >>> -support for the ARMv8.1-A architecture extension. In particular, it >>> -enables the @samp{+crc}, @samp{+lse}, and @samp{+rdma} features. >>> +The table below summarizes the permissible values for @var{arch} >>> +and the features that they enable by default: >>> + >>> +@multitable @columnfractions 0.20 0.20 0.60 >>> +@headitem @var{arch} value @tab Architecture @tab Includes by default >> >> We should have an armv8-a entry here, something like: >> >> @item @samp{armv8-a} @tab Armv8-A @tab @samp{+fp}, @samp{+simd} >> > > The armv8-a entry is added. > >>> +@item @samp{armv8.1-a} @tab Armv8.1-A >>> +@tab @samp{armv8-a}, @samp{+crc}, @samp{+lse}, @samp{+rdma} >>> +@item @samp{armv8.2-a} @tab Armv8.2-A @tab @samp{armv8.1-a} >>> +@item @samp{armv8.3-a} @tab Armv8.3-A @tab @samp{armv8.2-a} >>> +@item @samp{armv8.4-a} @tab Armv8.4-A >>> +@tab @samp{armv8.3-a}, @samp{+fp16fml}, @samp{+dotprod} >>> +@item @samp{armv8.5-a} @tab Armv8.5-A >>> +@tab @samp{armv8.4-a}, @samp{+sb}, @samp{+ssbs}, @samp{+predres} >>> +@item @samp{armv8.6-a} @tab Armv8.6-A >>> +@tab @samp{armv8.5-a}, @samp{+bf16}, @samp{+i8mm} >>> +@end multitable >> >> I should have tried a proof of concept of this before suggesting it, sorry. >> Trying the patch locally I get: >> >> gcc.pod around line 18643: You can't have =items (as at line 18649) unless >> the first thing after the =over is an =item >> POD document had syntax errors at /usr/bin/pod2man line 71. >> Makefile:3363: recipe for target 'doc/gcc.1' failed >> make: [doc/gcc.1] Error 1 (ignored) >> >> (Odd that this is an ignored error, since we end up with an empty man page.) >> >> I've posted a texi2pod.pl patch for that: >> >> https://gcc.gnu.org/ml/gcc-patches/2019-12/msg00407.html >> >> However, even with that patch, the script needs the full table row to be >> on a single line, so I think we need to do that and live with the long lines. >> > > The items are kept in a single line for each. > >>> [...] >>> diff --git a/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_2.c >>> b/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_2.c >>> index 608b89d19ce..5ae39bc6cf0 100644 >>> --- a/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_2.c >>> +++ b/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_2.c >>> @@ -13,6 +13,92 @@ >>> #error "__ARM_FEATURE_TME is defined but should not be!" >>> #endif >>> >>> +/* Test Armv8.6-a features. */ >>> + >>> +#pragma GCC push_options >>> +#pragma GCC target ("arch=armv8-a") >> >> These two pragmas should be at the beginning of the file, so that we >> start with base armv8-a for all the tests. > > The pragmas are moved to the top. > > The ChangeLog is updated as below: > > gcc/ChangeLog: > > 2019-12-12 Dennis Zhang <dennis.zh...@arm.com> > > * config/aarch64/aarch64-arches.def (armv8.6-a): New. > * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define > __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC and > __ARM_FEATURE_BF16_SCALAR_ARITHMETIC when enabled. > * config/aarch64/aarch64-option-extensions.def (i8mm, bf16): New. > (fp): Disabling fp also disables i8mm and bf16. > (simd): Disabling simd also disables i8mm. > * config/aarch64/aarch64.h (AARCH64_FL_V8_6): New macro. > (AARCH64_FL_I8MM, AARCH64_FL_BF16, AARCH64_FL_FOR_ARCH8_6): Likewise. > (AARCH64_ISA_V8_6, AARCH64_ISA_I8MM, AARCH64_ISA_BF16): Likewise. > (TARGET_I8MM, TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise. > * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options > and add a new table to list permissible values for ARCH. > > gcc/testsuite/ChangeLog: > > 2019-12-12 Dennis Zhang <dennis.zh...@arm.com> > > * gcc.target/aarch64/pragma_cpp_predefs_2.c: Add tests for i8mm > and bf16 features.
Thanks, applied as r279370. Richard