These are new tests. They verify if you are doing a vec_extract of a vector in
memory and the vector's address contains a large offset and the element number
is constant, it generates a prefixed load instruction when -mcpu=future.
Once all of the other V11 patches are checked in, can I check this patch into
the trunk?
2019-12-20 Michael Meissner <meiss...@linux.ibm.com>
* gcc.target/powerpc/vec-extract-large-si.c: New test for
vec_extract from a vector unsigned int in memory with a large
offset.
* gcc.target/powerpc/vec-extract-large-di.c: New test for
vec_extract from a vector long in memory with a large offset.
* gcc.target/powerpc/vec-extract-large-sf.c: New test for
vec_extract from a vector float in memory with a large offset.
* gcc.target/powerpc/vec-extract-large-df.c: New test for
vec_extract from a vector double in memory with a large offset.
Index: gcc/testsuite/gcc.target/powerpc/vec-extract-large-df.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/vec-extract-large-df.c (revision
279691)
+++ gcc/testsuite/gcc.target/powerpc/vec-extract-large-df.c (working copy)
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Test if we generate prefixed loads for vec_extract of a vector double in
+ memory, and the memory address has a large offset. */
+
+#include <altivec.h>
+
+#ifndef TYPE
+#define TYPE double
+#endif
+
+#ifndef LARGE
+#define LARGE 0x50000
+#endif
+
+TYPE
+get0 (vector TYPE *p)
+{
+ return vec_extract (p[LARGE], 0); /* PLFD. */
+}
+
+TYPE
+get1 (vector TYPE *p)
+{
+ return vec_extract (p[LARGE], 1); /* PLFD. */
+}
+
+/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */
Index: gcc/testsuite/gcc.target/powerpc/vec-extract-large-di.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/vec-extract-large-di.c (revision
279691)
+++ gcc/testsuite/gcc.target/powerpc/vec-extract-large-di.c (working copy)
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Test if we generate prefixed loads for vec_extract of a vector unsigned long
+ in memory, and the memory address has a large offset. */
+
+#include <altivec.h>
+
+#ifndef TYPE
+#define TYPE unsigned long
+#endif
+
+#ifndef LARGE
+#define LARGE 0x50000
+#endif
+
+TYPE
+get0 (vector TYPE *p)
+{
+ return vec_extract (p[LARGE], 0); /* PLD. */
+}
+
+TYPE
+get1 (vector TYPE *p)
+{
+ return vec_extract (p[LARGE], 1); /* PLD. */
+}
+
+/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */
Index: gcc/testsuite/gcc.target/powerpc/vec-extract-large-sf.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/vec-extract-large-sf.c (revision
279691)
+++ gcc/testsuite/gcc.target/powerpc/vec-extract-large-sf.c (working copy)
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Test if we generate prefixed loads for vec_extract of a vector float in
+ memory, and the memory address has a large offset. */
+
+#include <altivec.h>
+
+#ifndef TYPE
+#define TYPE float
+#endif
+
+#ifndef LARGE
+#define LARGE 0x50000
+#endif
+
+TYPE
+get0 (vector TYPE *p)
+{
+ return vec_extract (p[LARGE], 0); /* PLFS. */
+}
+
+TYPE
+get1 (vector TYPE *p)
+{
+ return vec_extract (p[LARGE], 1); /* PLFS. */
+}
+
+/* { dg-final { scan-assembler-times {\mplfs\M} 2 } } */
Index: gcc/testsuite/gcc.target/powerpc/vec-extract-large-si.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/vec-extract-large-si.c (revision
279691)
+++ gcc/testsuite/gcc.target/powerpc/vec-extract-large-si.c (working copy)
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Test if we generate prefixed loads for vec_extract of a vector unsigned int
+ in memory, and the memory address has a large offset. */
+
+#include <altivec.h>
+
+#ifndef TYPE
+#define TYPE unsigned int
+#endif
+
+#ifndef LARGE
+#define LARGE 0x50000
+#endif
+
+TYPE
+get0 (vector TYPE *p)
+{
+ return vec_extract (p[LARGE], 0); /* PLWZ. */
+}
+
+TYPE
+get1 (vector TYPE *p)
+{
+ return vec_extract (p[LARGE], 1); /* PLWZ. */
+}
+
+/* { dg-final { scan-assembler-times {\mplwz\M} 2 } } */
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.ibm.com, phone: +1 (978) 899-4797
