On Tue, Feb 25, 2020 at 10:49:16AM -0600, Peter Bergner wrote:
> POWER9 added the stxv instruction, which is d-form store. When we compile
> the FAILing test cases in PR93913 when -mcpu=power9 is the default, then
> we may sometimes get stxv rather than stvx generated. The fix here is
> to allow both mnemonics when counting.
Well, you now get an extra mask instruction (rldicr for example) as well,
right? While that mask usually isn't needed.
> -/* { dg-final { scan-assembler-times {\mstvx\M} 14 } } */
> +/* { dg-final { scan-assembler-times {\mstvx|stxv\M} 14 } } */
That checks if either the string
\mstvx
or the string
stxv\M
is part of the generated code.
You want
{\m(stvx|stxv)\M}
or
{\mstvx\M|\mstxv\M}
or
{\mst(vx|xv)\M}
or one of many more variants (maybe you want to allow stxvx as well, for
example).
Segher
