Hi Srinath, > -----Original Message----- > From: Srinath Parvathaneni <srinath.parvathan...@arm.com> > Sent: 10 March 2020 18:23 > To: gcc-patches@gcc.gnu.org > Cc: Kyrylo Tkachov <kyrylo.tkac...@arm.com> > Subject: [PATCH v2][ARM][GCC][4/2x]: MVE intrinsics with binary operands. > > Hello Kyrill, > > Following patch is the rebased version of v1. > (version v1) https://gcc.gnu.org/pipermail/gcc-patches/2019- > November/534336.html > > #### > > > Hello, > > This patch supports following MVE ACLE intrinsics with binary operands. > > vsubq_u8, vsubq_n_u8, vrmulhq_u8, vrhaddq_u8, vqsubq_u8, vqsubq_n_u8, > vqaddq_u8, > vqaddq_n_u8, vorrq_u8, vornq_u8, vmulq_u8, vmulq_n_u8, vmulltq_int_u8, > vmullbq_int_u8, > vmulhq_u8, vmladavq_u8, vminvq_u8, vminq_u8, vmaxvq_u8, vmaxq_u8, > vhsubq_u8, vhsubq_n_u8, > vhaddq_u8, vhaddq_n_u8, veorq_u8, vcmpneq_n_u8, vcmphiq_u8, > vcmphiq_n_u8, vcmpeqq_u8, > vcmpeqq_n_u8, vcmpcsq_u8, vcmpcsq_n_u8, vcaddq_rot90_u8, > vcaddq_rot270_u8, vbicq_u8, > vandq_u8, vaddvq_p_u8, vaddvaq_u8, vaddq_n_u8, vabdq_u8, vshlq_r_u8, > vrshlq_u8, > vrshlq_n_u8, vqshlq_u8, vqshlq_r_u8, vqrshlq_u8, vqrshlq_n_u8, > vminavq_s8, vminaq_s8, > vmaxavq_s8, vmaxaq_s8, vbrsrq_n_u8, vshlq_n_u8, vrshrq_n_u8, > vqshlq_n_u8, vcmpneq_n_s8, > vcmpltq_s8, vcmpltq_n_s8, vcmpleq_s8, vcmpleq_n_s8, vcmpgtq_s8, > vcmpgtq_n_s8, vcmpgeq_s8, > vcmpgeq_n_s8, vcmpeqq_s8, vcmpeqq_n_s8, vqshluq_n_s8, vaddvq_p_s8, > vsubq_s8, vsubq_n_s8, > vshlq_r_s8, vrshlq_s8, vrshlq_n_s8, vrmulhq_s8, vrhaddq_s8, vqsubq_s8, > vqsubq_n_s8, > vqshlq_s8, vqshlq_r_s8, vqrshlq_s8, vqrshlq_n_s8, vqrdmulhq_s8, > vqrdmulhq_n_s8, vqdmulhq_s8, > vqdmulhq_n_s8, vqaddq_s8, vqaddq_n_s8, vorrq_s8, vornq_s8, vmulq_s8, > vmulq_n_s8, vmulltq_int_s8, > vmullbq_int_s8, vmulhq_s8, vmlsdavxq_s8, vmlsdavq_s8, vmladavxq_s8, > vmladavq_s8, vminvq_s8, > vminq_s8, vmaxvq_s8, vmaxq_s8, vhsubq_s8, vhsubq_n_s8, > vhcaddq_rot90_s8, vhcaddq_rot270_s8, > vhaddq_s8, vhaddq_n_s8, veorq_s8, vcaddq_rot90_s8, vcaddq_rot270_s8, > vbrsrq_n_s8, vbicq_s8, > vandq_s8, vaddvaq_s8, vaddq_n_s8, vabdq_s8, vshlq_n_s8, vrshrq_n_s8, > vqshlq_n_s8, vsubq_u16, > vsubq_n_u16, vrmulhq_u16, vrhaddq_u16, vqsubq_u16, vqsubq_n_u16, > vqaddq_u16, vqaddq_n_u16, > vorrq_u16, vornq_u16, vmulq_u16, vmulq_n_u16, vmulltq_int_u16, > vmullbq_int_u16, vmulhq_u16, > vmladavq_u16, vminvq_u16, vminq_u16, vmaxvq_u16, vmaxq_u16, > vhsubq_u16, vhsubq_n_u16, > vhaddq_u16, vhaddq_n_u16, veorq_u16, vcmpneq_n_u16, vcmphiq_u16, > vcmphiq_n_u16, vcmpeqq_u16, > vcmpeqq_n_u16, vcmpcsq_u16, vcmpcsq_n_u16, vcaddq_rot90_u16, > vcaddq_rot270_u16, vbicq_u16, > vandq_u16, vaddvq_p_u16, vaddvaq_u16, vaddq_n_u16, vabdq_u16, > vshlq_r_u16, vrshlq_u16, > vrshlq_n_u16, vqshlq_u16, vqshlq_r_u16, vqrshlq_u16, vqrshlq_n_u16, > vminavq_s16, vminaq_s16, > vmaxavq_s16, vmaxaq_s16, vbrsrq_n_u16, vshlq_n_u16, vrshrq_n_u16, > vqshlq_n_u16, vcmpneq_n_s16, > vcmpltq_s16, vcmpltq_n_s16, vcmpleq_s16, vcmpleq_n_s16, vcmpgtq_s16, > vcmpgtq_n_s16, > vcmpgeq_s16, vcmpgeq_n_s16, vcmpeqq_s16, vcmpeqq_n_s16, > vqshluq_n_s16, vaddvq_p_s16, vsubq_s16, > vsubq_n_s16, vshlq_r_s16, vrshlq_s16, vrshlq_n_s16, vrmulhq_s16, > vrhaddq_s16, vqsubq_s16, > vqsubq_n_s16, vqshlq_s16, vqshlq_r_s16, vqrshlq_s16, vqrshlq_n_s16, > vqrdmulhq_s16, > vqrdmulhq_n_s16, vqdmulhq_s16, vqdmulhq_n_s16, vqaddq_s16, > vqaddq_n_s16, vorrq_s16, vornq_s16, > vmulq_s16, vmulq_n_s16, vmulltq_int_s16, vmullbq_int_s16, vmulhq_s16, > vmlsdavxq_s16, vmlsdavq_s16, > vmladavxq_s16, vmladavq_s16, vminvq_s16, vminq_s16, vmaxvq_s16, > vmaxq_s16, vhsubq_s16, > vhsubq_n_s16, vhcaddq_rot90_s16, vhcaddq_rot270_s16, vhaddq_s16, > vhaddq_n_s16, veorq_s16, > vcaddq_rot90_s16, vcaddq_rot270_s16, vbrsrq_n_s16, vbicq_s16, vandq_s16, > vaddvaq_s16, vaddq_n_s16, > vabdq_s16, vshlq_n_s16, vrshrq_n_s16, vqshlq_n_s16, vsubq_u32, > vsubq_n_u32, vrmulhq_u32, > vrhaddq_u32, vqsubq_u32, vqsubq_n_u32, vqaddq_u32, vqaddq_n_u32, > vorrq_u32, vornq_u32, vmulq_u32, > vmulq_n_u32, vmulltq_int_u32, vmullbq_int_u32, vmulhq_u32, > vmladavq_u32, vminvq_u32, vminq_u32, > vmaxvq_u32, vmaxq_u32, vhsubq_u32, vhsubq_n_u32, vhaddq_u32, > vhaddq_n_u32, veorq_u32, vcmpneq_n_u32, > vcmphiq_u32, vcmphiq_n_u32, vcmpeqq_u32, vcmpeqq_n_u32, > vcmpcsq_u32, vcmpcsq_n_u32, > vcaddq_rot90_u32, vcaddq_rot270_u32, vbicq_u32, vandq_u32, > vaddvq_p_u32, vaddvaq_u32, vaddq_n_u32, > vabdq_u32, vshlq_r_u32, vrshlq_u32, vrshlq_n_u32, vqshlq_u32, > vqshlq_r_u32, vqrshlq_u32, vqrshlq_n_u32, > vminavq_s32, vminaq_s32, vmaxavq_s32, vmaxaq_s32, vbrsrq_n_u32, > vshlq_n_u32, vrshrq_n_u32, > vqshlq_n_u32, vcmpneq_n_s32, vcmpltq_s32, vcmpltq_n_s32, vcmpleq_s32, > vcmpleq_n_s32, vcmpgtq_s32, > vcmpgtq_n_s32, vcmpgeq_s32, vcmpgeq_n_s32, vcmpeqq_s32, > vcmpeqq_n_s32, vqshluq_n_s32, vaddvq_p_s32, > vsubq_s32, vsubq_n_s32, vshlq_r_s32, vrshlq_s32, vrshlq_n_s32, > vrmulhq_s32, vrhaddq_s32, vqsubq_s32, > vqsubq_n_s32, vqshlq_s32, vqshlq_r_s32, vqrshlq_s32, vqrshlq_n_s32, > vqrdmulhq_s32, vqrdmulhq_n_s32, > vqdmulhq_s32, vqdmulhq_n_s32, vqaddq_s32, vqaddq_n_s32, vorrq_s32, > vornq_s32, vmulq_s32, vmulq_n_s32, > vmulltq_int_s32, vmullbq_int_s32, vmulhq_s32, vmlsdavxq_s32, > vmlsdavq_s32, vmladavxq_s32, vmladavq_s32, > vminvq_s32, vminq_s32, vmaxvq_s32, vmaxq_s32, vhsubq_s32, > vhsubq_n_s32, vhcaddq_rot90_s32, > vhcaddq_rot270_s32, vhaddq_s32, vhaddq_n_s32, veorq_s32, > vcaddq_rot90_s32, vcaddq_rot270_s32, > vbrsrq_n_s32, vbicq_s32, vandq_s32, vaddvaq_s32, vaddq_n_s32, > vabdq_s32, vshlq_n_s32, vrshrq_n_s32, > vqshlq_n_s32. > > Please refer to M-profile Vector Extension (MVE) intrinsics [1] for more > details. > [1] https://developer.arm.com/architectures/instruction-sets/simd- > isas/helium/mve-intrinsics > > In this patch new constraints "Ra" and "Rg" are added. > Ra checks the constant is with in the range of 0 to 7 where as Rg checks that > the constant is one among > 1, 2, 4 and 8. > > Also a new predicates "mve_imm_7" and "mve_imm_selective_upto_8" are > added, to check the the matching > constraint Ra and Rg respectively. > > The above intrinsics are defined using the already defined builtin qualifiers > BINOP_NONE_NONE_IMM, BINOP_NONE_NONE_NONE, > BINOP_NONE_NONE_UNONE, BINOP_UNONE_NONE_IMM, > BINOP_UNONE_NONE_NONE, BINOP_UNONE_UNONE_IMM, > BINOP_UNONE_UNONE_NONE, > BINOP_UNONE_UNONE_UNONE. > > Regression tested on target arm-none-eabi and armeb-none-eabi and found > no regressions. > > Ok for trunk?
Thanks, I've pushed this patch to master. Kyrill > > Thanks, > Srinath. > > gcc/ChangeLog: > > 2019-10-23 Andre Vieira <andre.simoesdiasvie...@arm.com> > Mihail Ionescu <mihail.ione...@arm.com> > Srinath Parvathaneni <srinath.parvathan...@arm.com> > > * config/arm/arm_mve.h (vsubq_u8): Define macro. > (vsubq_n_u8): Likewise. > (vrmulhq_u8): Likewise. > (vrhaddq_u8): Likewise. > (vqsubq_u8): Likewise. > (vqsubq_n_u8): Likewise. > (vqaddq_u8): Likewise. > (vqaddq_n_u8): Likewise. > (vorrq_u8): Likewise. > (vornq_u8): Likewise. > (vmulq_u8): Likewise. > (vmulq_n_u8): Likewise. > (vmulltq_int_u8): Likewise. > (vmullbq_int_u8): Likewise. > (vmulhq_u8): Likewise. > (vmladavq_u8): Likewise. > (vminvq_u8): Likewise. > (vminq_u8): Likewise. > (vmaxvq_u8): Likewise. > (vmaxq_u8): Likewise. > (vhsubq_u8): Likewise. > (vhsubq_n_u8): Likewise. > (vhaddq_u8): Likewise. > (vhaddq_n_u8): Likewise. > (veorq_u8): Likewise. > (vcmpneq_n_u8): Likewise. > (vcmphiq_u8): Likewise. > (vcmphiq_n_u8): Likewise. > (vcmpeqq_u8): Likewise. > (vcmpeqq_n_u8): Likewise. > (vcmpcsq_u8): Likewise. > (vcmpcsq_n_u8): Likewise. > (vcaddq_rot90_u8): Likewise. > (vcaddq_rot270_u8): Likewise. > (vbicq_u8): Likewise. > (vandq_u8): Likewise. > (vaddvq_p_u8): Likewise. > (vaddvaq_u8): Likewise. > (vaddq_n_u8): Likewise. > (vabdq_u8): Likewise. > (vshlq_r_u8): Likewise. > (vrshlq_u8): Likewise. > (vrshlq_n_u8): Likewise. > (vqshlq_u8): Likewise. > (vqshlq_r_u8): Likewise. > (vqrshlq_u8): Likewise. > (vqrshlq_n_u8): Likewise. > (vminavq_s8): Likewise. > (vminaq_s8): Likewise. > (vmaxavq_s8): Likewise. > (vmaxaq_s8): Likewise. > (vbrsrq_n_u8): Likewise. > (vshlq_n_u8): Likewise. > (vrshrq_n_u8): Likewise. > (vqshlq_n_u8): Likewise. > (vcmpneq_n_s8): Likewise. > (vcmpltq_s8): Likewise. > (vcmpltq_n_s8): Likewise. > (vcmpleq_s8): Likewise. > (vcmpleq_n_s8): Likewise. > (vcmpgtq_s8): Likewise. > (vcmpgtq_n_s8): Likewise. > (vcmpgeq_s8): Likewise. > (vcmpgeq_n_s8): Likewise. > (vcmpeqq_s8): Likewise. > (vcmpeqq_n_s8): Likewise. > (vqshluq_n_s8): Likewise. > (vaddvq_p_s8): Likewise. > (vsubq_s8): Likewise. > (vsubq_n_s8): Likewise. > (vshlq_r_s8): Likewise. > (vrshlq_s8): Likewise. > (vrshlq_n_s8): Likewise. > (vrmulhq_s8): Likewise. > (vrhaddq_s8): Likewise. > (vqsubq_s8): Likewise. > (vqsubq_n_s8): Likewise. > (vqshlq_s8): Likewise. > (vqshlq_r_s8): Likewise. > (vqrshlq_s8): Likewise. > (vqrshlq_n_s8): Likewise. > (vqrdmulhq_s8): Likewise. > (vqrdmulhq_n_s8): Likewise. > (vqdmulhq_s8): Likewise. > (vqdmulhq_n_s8): Likewise. > (vqaddq_s8): Likewise. > (vqaddq_n_s8): Likewise. > (vorrq_s8): Likewise. > (vornq_s8): Likewise. > (vmulq_s8): Likewise. > (vmulq_n_s8): Likewise. > (vmulltq_int_s8): Likewise. > (vmullbq_int_s8): Likewise. > (vmulhq_s8): Likewise. > (vmlsdavxq_s8): Likewise. > (vmlsdavq_s8): Likewise. > (vmladavxq_s8): Likewise. > (vmladavq_s8): Likewise. > (vminvq_s8): Likewise. > (vminq_s8): Likewise. > (vmaxvq_s8): Likewise. > (vmaxq_s8): Likewise. > (vhsubq_s8): Likewise. > (vhsubq_n_s8): Likewise. > (vhcaddq_rot90_s8): Likewise. > (vhcaddq_rot270_s8): Likewise. > (vhaddq_s8): Likewise. > (vhaddq_n_s8): Likewise. > (veorq_s8): Likewise. > (vcaddq_rot90_s8): Likewise. > (vcaddq_rot270_s8): Likewise. > (vbrsrq_n_s8): Likewise. > (vbicq_s8): Likewise. > (vandq_s8): Likewise. > (vaddvaq_s8): Likewise. > (vaddq_n_s8): Likewise. > (vabdq_s8): Likewise. > (vshlq_n_s8): Likewise. > (vrshrq_n_s8): Likewise. > (vqshlq_n_s8): Likewise. > (vsubq_u16): Likewise. > (vsubq_n_u16): Likewise. > (vrmulhq_u16): Likewise. > (vrhaddq_u16): Likewise. > (vqsubq_u16): Likewise. > (vqsubq_n_u16): Likewise. > (vqaddq_u16): Likewise. > (vqaddq_n_u16): Likewise. > (vorrq_u16): Likewise. > (vornq_u16): Likewise. > (vmulq_u16): Likewise. > (vmulq_n_u16): Likewise. > (vmulltq_int_u16): Likewise. > (vmullbq_int_u16): Likewise. > (vmulhq_u16): Likewise. > (vmladavq_u16): Likewise. > (vminvq_u16): Likewise. > (vminq_u16): Likewise. > (vmaxvq_u16): Likewise. > (vmaxq_u16): Likewise. > (vhsubq_u16): Likewise. > (vhsubq_n_u16): Likewise. > (vhaddq_u16): Likewise. > (vhaddq_n_u16): Likewise. > (veorq_u16): Likewise. > (vcmpneq_n_u16): Likewise. > (vcmphiq_u16): Likewise. > (vcmphiq_n_u16): Likewise. > (vcmpeqq_u16): Likewise. > (vcmpeqq_n_u16): Likewise. > (vcmpcsq_u16): Likewise. > (vcmpcsq_n_u16): Likewise. > (vcaddq_rot90_u16): Likewise. > (vcaddq_rot270_u16): Likewise. > (vbicq_u16): Likewise. > (vandq_u16): Likewise. > (vaddvq_p_u16): Likewise. > (vaddvaq_u16): Likewise. > (vaddq_n_u16): Likewise. > (vabdq_u16): Likewise. > (vshlq_r_u16): Likewise. > (vrshlq_u16): Likewise. > (vrshlq_n_u16): Likewise. > (vqshlq_u16): Likewise. > (vqshlq_r_u16): Likewise. > (vqrshlq_u16): Likewise. > (vqrshlq_n_u16): Likewise. > (vminavq_s16): Likewise. > (vminaq_s16): Likewise. > (vmaxavq_s16): Likewise. > (vmaxaq_s16): Likewise. > (vbrsrq_n_u16): Likewise. > (vshlq_n_u16): Likewise. > (vrshrq_n_u16): Likewise. > (vqshlq_n_u16): Likewise. > (vcmpneq_n_s16): Likewise. > (vcmpltq_s16): Likewise. > (vcmpltq_n_s16): Likewise. > (vcmpleq_s16): Likewise. > (vcmpleq_n_s16): Likewise. > (vcmpgtq_s16): Likewise. > (vcmpgtq_n_s16): Likewise. > (vcmpgeq_s16): Likewise. > (vcmpgeq_n_s16): Likewise. > (vcmpeqq_s16): Likewise. > (vcmpeqq_n_s16): Likewise. > (vqshluq_n_s16): Likewise. > (vaddvq_p_s16): Likewise. > (vsubq_s16): Likewise. > (vsubq_n_s16): Likewise. > (vshlq_r_s16): Likewise. > (vrshlq_s16): Likewise. > (vrshlq_n_s16): Likewise. > (vrmulhq_s16): Likewise. > (vrhaddq_s16): Likewise. > (vqsubq_s16): Likewise. > (vqsubq_n_s16): Likewise. > (vqshlq_s16): Likewise. > (vqshlq_r_s16): Likewise. > (vqrshlq_s16): Likewise. > (vqrshlq_n_s16): Likewise. > (vqrdmulhq_s16): Likewise. > (vqrdmulhq_n_s16): Likewise. > (vqdmulhq_s16): Likewise. > (vqdmulhq_n_s16): Likewise. > (vqaddq_s16): Likewise. > (vqaddq_n_s16): Likewise. > (vorrq_s16): Likewise. > (vornq_s16): Likewise. > (vmulq_s16): Likewise. > (vmulq_n_s16): Likewise. > (vmulltq_int_s16): Likewise. > (vmullbq_int_s16): Likewise. > (vmulhq_s16): Likewise. > (vmlsdavxq_s16): Likewise. > (vmlsdavq_s16): Likewise. > (vmladavxq_s16): Likewise. > (vmladavq_s16): Likewise. > (vminvq_s16): Likewise. > (vminq_s16): Likewise. > (vmaxvq_s16): Likewise. > (vmaxq_s16): Likewise. > (vhsubq_s16): Likewise. > (vhsubq_n_s16): Likewise. > (vhcaddq_rot90_s16): Likewise. > (vhcaddq_rot270_s16): Likewise. > (vhaddq_s16): Likewise. > (vhaddq_n_s16): Likewise. > (veorq_s16): Likewise. > (vcaddq_rot90_s16): Likewise. > (vcaddq_rot270_s16): Likewise. > (vbrsrq_n_s16): Likewise. > (vbicq_s16): Likewise. > (vandq_s16): Likewise. > (vaddvaq_s16): Likewise. > (vaddq_n_s16): Likewise. > (vabdq_s16): Likewise. > (vshlq_n_s16): Likewise. > (vrshrq_n_s16): Likewise. > (vqshlq_n_s16): Likewise. > (vsubq_u32): Likewise. > (vsubq_n_u32): Likewise. > (vrmulhq_u32): Likewise. > (vrhaddq_u32): Likewise. > (vqsubq_u32): Likewise. > (vqsubq_n_u32): Likewise. > (vqaddq_u32): Likewise. > (vqaddq_n_u32): Likewise. > (vorrq_u32): Likewise. > (vornq_u32): Likewise. > (vmulq_u32): Likewise. > (vmulq_n_u32): Likewise. > (vmulltq_int_u32): Likewise. > (vmullbq_int_u32): Likewise. > (vmulhq_u32): Likewise. > (vmladavq_u32): Likewise. > (vminvq_u32): Likewise. > (vminq_u32): Likewise. > (vmaxvq_u32): Likewise. > (vmaxq_u32): Likewise. > (vhsubq_u32): Likewise. > (vhsubq_n_u32): Likewise. > (vhaddq_u32): Likewise. > (vhaddq_n_u32): Likewise. > (veorq_u32): Likewise. > (vcmpneq_n_u32): Likewise. > (vcmphiq_u32): Likewise. > (vcmphiq_n_u32): Likewise. > (vcmpeqq_u32): Likewise. > (vcmpeqq_n_u32): Likewise. > (vcmpcsq_u32): Likewise. > (vcmpcsq_n_u32): Likewise. > (vcaddq_rot90_u32): Likewise. > (vcaddq_rot270_u32): Likewise. > (vbicq_u32): Likewise. > (vandq_u32): Likewise. > (vaddvq_p_u32): Likewise. > (vaddvaq_u32): Likewise. > (vaddq_n_u32): Likewise. > (vabdq_u32): Likewise. > (vshlq_r_u32): Likewise. > (vrshlq_u32): Likewise. > (vrshlq_n_u32): Likewise. > (vqshlq_u32): Likewise. > (vqshlq_r_u32): Likewise. > (vqrshlq_u32): Likewise. > (vqrshlq_n_u32): Likewise. > (vminavq_s32): Likewise. > (vminaq_s32): Likewise. > (vmaxavq_s32): Likewise. > (vmaxaq_s32): Likewise. > (vbrsrq_n_u32): Likewise. > (vshlq_n_u32): Likewise. > (vrshrq_n_u32): Likewise. > (vqshlq_n_u32): Likewise. > (vcmpneq_n_s32): Likewise. > (vcmpltq_s32): Likewise. > (vcmpltq_n_s32): Likewise. > (vcmpleq_s32): Likewise. > (vcmpleq_n_s32): Likewise. > (vcmpgtq_s32): Likewise. > (vcmpgtq_n_s32): Likewise. > (vcmpgeq_s32): Likewise. > (vcmpgeq_n_s32): Likewise. > (vcmpeqq_s32): Likewise. > (vcmpeqq_n_s32): Likewise. > (vqshluq_n_s32): Likewise. > (vaddvq_p_s32): Likewise. > (vsubq_s32): Likewise. > (vsubq_n_s32): Likewise. > (vshlq_r_s32): Likewise. > (vrshlq_s32): Likewise. > (vrshlq_n_s32): Likewise. > (vrmulhq_s32): Likewise. > (vrhaddq_s32): Likewise. > (vqsubq_s32): Likewise. > (vqsubq_n_s32): Likewise. > (vqshlq_s32): Likewise. > (vqshlq_r_s32): Likewise. > (vqrshlq_s32): Likewise. > (vqrshlq_n_s32): Likewise. > (vqrdmulhq_s32): Likewise. > (vqrdmulhq_n_s32): Likewise. > (vqdmulhq_s32): Likewise. > (vqdmulhq_n_s32): Likewise. > (vqaddq_s32): Likewise. > (vqaddq_n_s32): Likewise. > (vorrq_s32): Likewise. > (vornq_s32): Likewise. > (vmulq_s32): Likewise. > (vmulq_n_s32): Likewise. > (vmulltq_int_s32): Likewise. > (vmullbq_int_s32): Likewise. > (vmulhq_s32): Likewise. > (vmlsdavxq_s32): Likewise. > (vmlsdavq_s32): Likewise. > (vmladavxq_s32): Likewise. > (vmladavq_s32): Likewise. > (vminvq_s32): Likewise. > (vminq_s32): Likewise. > (vmaxvq_s32): Likewise. > (vmaxq_s32): Likewise. > (vhsubq_s32): Likewise. > (vhsubq_n_s32): Likewise. > (vhcaddq_rot90_s32): Likewise. > (vhcaddq_rot270_s32): Likewise. > (vhaddq_s32): Likewise. > (vhaddq_n_s32): Likewise. > (veorq_s32): Likewise. > (vcaddq_rot90_s32): Likewise. > (vcaddq_rot270_s32): Likewise. > (vbrsrq_n_s32): Likewise. > (vbicq_s32): Likewise. > (vandq_s32): Likewise. > (vaddvaq_s32): Likewise. > (vaddq_n_s32): Likewise. > (vabdq_s32): Likewise. > (vshlq_n_s32): Likewise. > (vrshrq_n_s32): Likewise. > (vqshlq_n_s32): Likewise. > (__arm_vsubq_u8): Define intrinsic. > (__arm_vsubq_n_u8): Likewise. > (__arm_vrmulhq_u8): Likewise. > (__arm_vrhaddq_u8): Likewise. > (__arm_vqsubq_u8): Likewise. > (__arm_vqsubq_n_u8): Likewise. > (__arm_vqaddq_u8): Likewise. > (__arm_vqaddq_n_u8): Likewise. > (__arm_vorrq_u8): Likewise. > (__arm_vornq_u8): Likewise. > (__arm_vmulq_u8): Likewise. > (__arm_vmulq_n_u8): Likewise. > (__arm_vmulltq_int_u8): Likewise. > (__arm_vmullbq_int_u8): Likewise. > (__arm_vmulhq_u8): Likewise. > (__arm_vmladavq_u8): Likewise. > (__arm_vminvq_u8): Likewise. > (__arm_vminq_u8): Likewise. > (__arm_vmaxvq_u8): Likewise. > (__arm_vmaxq_u8): Likewise. > (__arm_vhsubq_u8): Likewise. > (__arm_vhsubq_n_u8): Likewise. > (__arm_vhaddq_u8): Likewise. > (__arm_vhaddq_n_u8): Likewise. > (__arm_veorq_u8): Likewise. > (__arm_vcmpneq_n_u8): Likewise. > (__arm_vcmphiq_u8): Likewise. > (__arm_vcmphiq_n_u8): Likewise. > (__arm_vcmpeqq_u8): Likewise. > (__arm_vcmpeqq_n_u8): Likewise. > (__arm_vcmpcsq_u8): Likewise. > (__arm_vcmpcsq_n_u8): Likewise. > (__arm_vcaddq_rot90_u8): Likewise. > (__arm_vcaddq_rot270_u8): Likewise. > (__arm_vbicq_u8): Likewise. > (__arm_vandq_u8): Likewise. > (__arm_vaddvq_p_u8): Likewise. > (__arm_vaddvaq_u8): Likewise. > (__arm_vaddq_n_u8): Likewise. > (__arm_vabdq_u8): Likewise. > (__arm_vshlq_r_u8): Likewise. > (__arm_vrshlq_u8): Likewise. > (__arm_vrshlq_n_u8): Likewise. > (__arm_vqshlq_u8): Likewise. > (__arm_vqshlq_r_u8): Likewise. > (__arm_vqrshlq_u8): Likewise. > (__arm_vqrshlq_n_u8): Likewise. > (__arm_vminavq_s8): Likewise. > (__arm_vminaq_s8): Likewise. > (__arm_vmaxavq_s8): Likewise. > (__arm_vmaxaq_s8): Likewise. > (__arm_vbrsrq_n_u8): Likewise. > (__arm_vshlq_n_u8): Likewise. > (__arm_vrshrq_n_u8): Likewise. > (__arm_vqshlq_n_u8): Likewise. > (__arm_vcmpneq_n_s8): Likewise. > (__arm_vcmpltq_s8): Likewise. > (__arm_vcmpltq_n_s8): Likewise. > (__arm_vcmpleq_s8): Likewise. > (__arm_vcmpleq_n_s8): Likewise. > (__arm_vcmpgtq_s8): Likewise. > (__arm_vcmpgtq_n_s8): Likewise. > (__arm_vcmpgeq_s8): Likewise. > (__arm_vcmpgeq_n_s8): Likewise. > (__arm_vcmpeqq_s8): Likewise. > (__arm_vcmpeqq_n_s8): Likewise. > (__arm_vqshluq_n_s8): Likewise. > (__arm_vaddvq_p_s8): Likewise. > (__arm_vsubq_s8): Likewise. > (__arm_vsubq_n_s8): Likewise. > (__arm_vshlq_r_s8): Likewise. > (__arm_vrshlq_s8): Likewise. > (__arm_vrshlq_n_s8): Likewise. > (__arm_vrmulhq_s8): Likewise. > (__arm_vrhaddq_s8): Likewise. > (__arm_vqsubq_s8): Likewise. > (__arm_vqsubq_n_s8): Likewise. > (__arm_vqshlq_s8): Likewise. > (__arm_vqshlq_r_s8): Likewise. > (__arm_vqrshlq_s8): Likewise. > (__arm_vqrshlq_n_s8): Likewise. > (__arm_vqrdmulhq_s8): Likewise. > (__arm_vqrdmulhq_n_s8): Likewise. > (__arm_vqdmulhq_s8): Likewise. > (__arm_vqdmulhq_n_s8): Likewise. > (__arm_vqaddq_s8): Likewise. > (__arm_vqaddq_n_s8): Likewise. > (__arm_vorrq_s8): Likewise. > (__arm_vornq_s8): Likewise. > (__arm_vmulq_s8): Likewise. > (__arm_vmulq_n_s8): Likewise. > (__arm_vmulltq_int_s8): Likewise. > (__arm_vmullbq_int_s8): Likewise. > (__arm_vmulhq_s8): Likewise. > (__arm_vmlsdavxq_s8): Likewise. > (__arm_vmlsdavq_s8): Likewise. > (__arm_vmladavxq_s8): Likewise. > (__arm_vmladavq_s8): Likewise. > (__arm_vminvq_s8): Likewise. > (__arm_vminq_s8): Likewise. > (__arm_vmaxvq_s8): Likewise. > (__arm_vmaxq_s8): Likewise. > (__arm_vhsubq_s8): Likewise. > (__arm_vhsubq_n_s8): Likewise. > (__arm_vhcaddq_rot90_s8): Likewise. > (__arm_vhcaddq_rot270_s8): Likewise. > (__arm_vhaddq_s8): Likewise. > (__arm_vhaddq_n_s8): Likewise. > (__arm_veorq_s8): Likewise. > (__arm_vcaddq_rot90_s8): Likewise. > (__arm_vcaddq_rot270_s8): Likewise. > (__arm_vbrsrq_n_s8): Likewise. > (__arm_vbicq_s8): Likewise. > (__arm_vandq_s8): Likewise. > (__arm_vaddvaq_s8): Likewise. > (__arm_vaddq_n_s8): Likewise. > (__arm_vabdq_s8): Likewise. > (__arm_vshlq_n_s8): Likewise. > (__arm_vrshrq_n_s8): Likewise. > (__arm_vqshlq_n_s8): Likewise. > (__arm_vsubq_u16): Likewise. > (__arm_vsubq_n_u16): Likewise. > (__arm_vrmulhq_u16): Likewise. > (__arm_vrhaddq_u16): Likewise. > (__arm_vqsubq_u16): Likewise. > (__arm_vqsubq_n_u16): Likewise. > (__arm_vqaddq_u16): Likewise. > (__arm_vqaddq_n_u16): Likewise. > (__arm_vorrq_u16): Likewise. > (__arm_vornq_u16): Likewise. > (__arm_vmulq_u16): Likewise. > (__arm_vmulq_n_u16): Likewise. > (__arm_vmulltq_int_u16): Likewise. > (__arm_vmullbq_int_u16): Likewise. > (__arm_vmulhq_u16): Likewise. > (__arm_vmladavq_u16): Likewise. > (__arm_vminvq_u16): Likewise. > (__arm_vminq_u16): Likewise. > (__arm_vmaxvq_u16): Likewise. > (__arm_vmaxq_u16): Likewise. > (__arm_vhsubq_u16): Likewise. > (__arm_vhsubq_n_u16): Likewise. > (__arm_vhaddq_u16): Likewise. > (__arm_vhaddq_n_u16): Likewise. > (__arm_veorq_u16): Likewise. > (__arm_vcmpneq_n_u16): Likewise. > (__arm_vcmphiq_u16): Likewise. > (__arm_vcmphiq_n_u16): Likewise. > (__arm_vcmpeqq_u16): Likewise. > (__arm_vcmpeqq_n_u16): Likewise. > (__arm_vcmpcsq_u16): Likewise. > (__arm_vcmpcsq_n_u16): Likewise. > (__arm_vcaddq_rot90_u16): Likewise. > (__arm_vcaddq_rot270_u16): Likewise. > (__arm_vbicq_u16): Likewise. > (__arm_vandq_u16): Likewise. > (__arm_vaddvq_p_u16): Likewise. > (__arm_vaddvaq_u16): Likewise. > (__arm_vaddq_n_u16): Likewise. > (__arm_vabdq_u16): Likewise. > (__arm_vshlq_r_u16): Likewise. > (__arm_vrshlq_u16): Likewise. > (__arm_vrshlq_n_u16): Likewise. > (__arm_vqshlq_u16): Likewise. > (__arm_vqshlq_r_u16): Likewise. > (__arm_vqrshlq_u16): Likewise. > (__arm_vqrshlq_n_u16): Likewise. > (__arm_vminavq_s16): Likewise. > (__arm_vminaq_s16): Likewise. > (__arm_vmaxavq_s16): Likewise. > (__arm_vmaxaq_s16): Likewise. > (__arm_vbrsrq_n_u16): Likewise. > (__arm_vshlq_n_u16): Likewise. > (__arm_vrshrq_n_u16): Likewise. > (__arm_vqshlq_n_u16): Likewise. > (__arm_vcmpneq_n_s16): Likewise. > (__arm_vcmpltq_s16): Likewise. > (__arm_vcmpltq_n_s16): Likewise. > (__arm_vcmpleq_s16): Likewise. > (__arm_vcmpleq_n_s16): Likewise. > (__arm_vcmpgtq_s16): Likewise. > (__arm_vcmpgtq_n_s16): Likewise. > (__arm_vcmpgeq_s16): Likewise. > (__arm_vcmpgeq_n_s16): Likewise. > (__arm_vcmpeqq_s16): Likewise. > (__arm_vcmpeqq_n_s16): Likewise. > (__arm_vqshluq_n_s16): Likewise. > (__arm_vaddvq_p_s16): Likewise. > (__arm_vsubq_s16): Likewise. > (__arm_vsubq_n_s16): Likewise. > (__arm_vshlq_r_s16): Likewise. > (__arm_vrshlq_s16): Likewise. > (__arm_vrshlq_n_s16): Likewise. > (__arm_vrmulhq_s16): Likewise. > (__arm_vrhaddq_s16): Likewise. > (__arm_vqsubq_s16): Likewise. > (__arm_vqsubq_n_s16): Likewise. > (__arm_vqshlq_s16): Likewise. > (__arm_vqshlq_r_s16): Likewise. > (__arm_vqrshlq_s16): Likewise. > (__arm_vqrshlq_n_s16): Likewise. > (__arm_vqrdmulhq_s16): Likewise. > (__arm_vqrdmulhq_n_s16): Likewise. > (__arm_vqdmulhq_s16): Likewise. > (__arm_vqdmulhq_n_s16): Likewise. > (__arm_vqaddq_s16): Likewise. > (__arm_vqaddq_n_s16): Likewise. > (__arm_vorrq_s16): Likewise. > (__arm_vornq_s16): Likewise. > (__arm_vmulq_s16): Likewise. > (__arm_vmulq_n_s16): Likewise. > (__arm_vmulltq_int_s16): Likewise. > (__arm_vmullbq_int_s16): Likewise. > (__arm_vmulhq_s16): Likewise. > (__arm_vmlsdavxq_s16): Likewise. > (__arm_vmlsdavq_s16): Likewise. > (__arm_vmladavxq_s16): Likewise. > (__arm_vmladavq_s16): Likewise. > (__arm_vminvq_s16): Likewise. > (__arm_vminq_s16): Likewise. > (__arm_vmaxvq_s16): Likewise. > (__arm_vmaxq_s16): Likewise. > (__arm_vhsubq_s16): Likewise. > (__arm_vhsubq_n_s16): Likewise. > (__arm_vhcaddq_rot90_s16): Likewise. > (__arm_vhcaddq_rot270_s16): Likewise. > (__arm_vhaddq_s16): Likewise. > (__arm_vhaddq_n_s16): Likewise. > (__arm_veorq_s16): Likewise. > (__arm_vcaddq_rot90_s16): Likewise. > (__arm_vcaddq_rot270_s16): Likewise. > (__arm_vbrsrq_n_s16): Likewise. > (__arm_vbicq_s16): Likewise. > (__arm_vandq_s16): Likewise. > (__arm_vaddvaq_s16): Likewise. > (__arm_vaddq_n_s16): Likewise. > (__arm_vabdq_s16): Likewise. > (__arm_vshlq_n_s16): Likewise. > (__arm_vrshrq_n_s16): Likewise. > (__arm_vqshlq_n_s16): Likewise. > (__arm_vsubq_u32): Likewise. > (__arm_vsubq_n_u32): Likewise. > (__arm_vrmulhq_u32): Likewise. > (__arm_vrhaddq_u32): Likewise. > (__arm_vqsubq_u32): Likewise. > (__arm_vqsubq_n_u32): Likewise. > (__arm_vqaddq_u32): Likewise. > (__arm_vqaddq_n_u32): Likewise. > (__arm_vorrq_u32): Likewise. > (__arm_vornq_u32): Likewise. > (__arm_vmulq_u32): Likewise. > (__arm_vmulq_n_u32): Likewise. > (__arm_vmulltq_int_u32): Likewise. > (__arm_vmullbq_int_u32): Likewise. > (__arm_vmulhq_u32): Likewise. > (__arm_vmladavq_u32): Likewise. > (__arm_vminvq_u32): Likewise. > (__arm_vminq_u32): Likewise. > (__arm_vmaxvq_u32): Likewise. > (__arm_vmaxq_u32): Likewise. > (__arm_vhsubq_u32): Likewise. > (__arm_vhsubq_n_u32): Likewise. > (__arm_vhaddq_u32): Likewise. > (__arm_vhaddq_n_u32): Likewise. > (__arm_veorq_u32): Likewise. > (__arm_vcmpneq_n_u32): Likewise. > (__arm_vcmphiq_u32): Likewise. > (__arm_vcmphiq_n_u32): Likewise. > (__arm_vcmpeqq_u32): Likewise. > (__arm_vcmpeqq_n_u32): Likewise. > (__arm_vcmpcsq_u32): Likewise. > (__arm_vcmpcsq_n_u32): Likewise. > (__arm_vcaddq_rot90_u32): Likewise. > (__arm_vcaddq_rot270_u32): Likewise. > (__arm_vbicq_u32): Likewise. > (__arm_vandq_u32): Likewise. > (__arm_vaddvq_p_u32): Likewise. > (__arm_vaddvaq_u32): Likewise. > (__arm_vaddq_n_u32): Likewise. > (__arm_vabdq_u32): Likewise. > (__arm_vshlq_r_u32): Likewise. > (__arm_vrshlq_u32): Likewise. > (__arm_vrshlq_n_u32): Likewise. > (__arm_vqshlq_u32): Likewise. > (__arm_vqshlq_r_u32): Likewise. > (__arm_vqrshlq_u32): Likewise. > (__arm_vqrshlq_n_u32): Likewise. > (__arm_vminavq_s32): Likewise. > (__arm_vminaq_s32): Likewise. > (__arm_vmaxavq_s32): Likewise. > (__arm_vmaxaq_s32): Likewise. > (__arm_vbrsrq_n_u32): Likewise. > (__arm_vshlq_n_u32): Likewise. > (__arm_vrshrq_n_u32): Likewise. > (__arm_vqshlq_n_u32): Likewise. > (__arm_vcmpneq_n_s32): Likewise. > (__arm_vcmpltq_s32): Likewise. > (__arm_vcmpltq_n_s32): Likewise. > (__arm_vcmpleq_s32): Likewise. > (__arm_vcmpleq_n_s32): Likewise. > (__arm_vcmpgtq_s32): Likewise. > (__arm_vcmpgtq_n_s32): Likewise. > (__arm_vcmpgeq_s32): Likewise. > (__arm_vcmpgeq_n_s32): Likewise. > (__arm_vcmpeqq_s32): Likewise. > (__arm_vcmpeqq_n_s32): Likewise. > (__arm_vqshluq_n_s32): Likewise. > (__arm_vaddvq_p_s32): Likewise. > (__arm_vsubq_s32): Likewise. > (__arm_vsubq_n_s32): Likewise. > (__arm_vshlq_r_s32): Likewise. > (__arm_vrshlq_s32): Likewise. > (__arm_vrshlq_n_s32): Likewise. > (__arm_vrmulhq_s32): Likewise. > (__arm_vrhaddq_s32): Likewise. > (__arm_vqsubq_s32): Likewise. > (__arm_vqsubq_n_s32): Likewise. > (__arm_vqshlq_s32): Likewise. > (__arm_vqshlq_r_s32): Likewise. > (__arm_vqrshlq_s32): Likewise. > (__arm_vqrshlq_n_s32): Likewise. > (__arm_vqrdmulhq_s32): Likewise. > (__arm_vqrdmulhq_n_s32): Likewise. > (__arm_vqdmulhq_s32): Likewise. > (__arm_vqdmulhq_n_s32): Likewise. > (__arm_vqaddq_s32): Likewise. > (__arm_vqaddq_n_s32): Likewise. > (__arm_vorrq_s32): Likewise. > (__arm_vornq_s32): Likewise. > (__arm_vmulq_s32): Likewise. > (__arm_vmulq_n_s32): Likewise. > (__arm_vmulltq_int_s32): Likewise. > (__arm_vmullbq_int_s32): Likewise. > (__arm_vmulhq_s32): Likewise. > (__arm_vmlsdavxq_s32): Likewise. > (__arm_vmlsdavq_s32): Likewise. > (__arm_vmladavxq_s32): Likewise. > (__arm_vmladavq_s32): Likewise. > (__arm_vminvq_s32): Likewise. > (__arm_vminq_s32): Likewise. > (__arm_vmaxvq_s32): Likewise. > (__arm_vmaxq_s32): Likewise. > (__arm_vhsubq_s32): Likewise. > (__arm_vhsubq_n_s32): Likewise. > (__arm_vhcaddq_rot90_s32): Likewise. > (__arm_vhcaddq_rot270_s32): Likewise. > (__arm_vhaddq_s32): Likewise. > (__arm_vhaddq_n_s32): Likewise. > (__arm_veorq_s32): Likewise. > (__arm_vcaddq_rot90_s32): Likewise. > (__arm_vcaddq_rot270_s32): Likewise. > (__arm_vbrsrq_n_s32): Likewise. > (__arm_vbicq_s32): Likewise. > (__arm_vandq_s32): Likewise. > (__arm_vaddvaq_s32): Likewise. > (__arm_vaddq_n_s32): Likewise. > (__arm_vabdq_s32): Likewise. > (__arm_vshlq_n_s32): Likewise. > (__arm_vrshrq_n_s32): Likewise. > (__arm_vqshlq_n_s32): Likewise. > (vsubq): Define polymorphic variant. > (vsubq_n): Likewise. > (vshlq_r): Likewise. > (vrshlq_n): Likewise. > (vrshlq): Likewise. > (vrmulhq): Likewise. > (vrhaddq): Likewise. > (vqsubq_n): Likewise. > (vqsubq): Likewise. > (vqshlq): Likewise. > (vqshlq_r): Likewise. > (vqshluq): Likewise. > (vrshrq_n): Likewise. > (vshlq_n): Likewise. > (vqshluq_n): Likewise. > (vqshlq_n): Likewise. > (vqrshlq_n): Likewise. > (vqrshlq): Likewise. > (vqrdmulhq_n): Likewise. > (vqrdmulhq): Likewise. > (vqdmulhq_n): Likewise. > (vqdmulhq): Likewise. > (vqaddq_n): Likewise. > (vqaddq): Likewise. > (vorrq_n): Likewise. > (vorrq): Likewise. > (vornq): Likewise. > (vmulq_n): Likewise. > (vmulq): Likewise. > (vmulltq_int): Likewise. > (vmullbq_int): Likewise. > (vmulhq): Likewise. > (vminq): Likewise. > (vminaq): Likewise. > (vmaxq): Likewise. > (vmaxaq): Likewise. > (vhsubq_n): Likewise. > (vhsubq): Likewise. > (vhcaddq_rot90): Likewise. > (vhcaddq_rot270): Likewise. > (vhaddq_n): Likewise. > (vhaddq): Likewise. > (veorq): Likewise. > (vcaddq_rot90): Likewise. > (vcaddq_rot270): Likewise. > (vbrsrq_n): Likewise. > (vbicq_n): Likewise. > (vbicq): Likewise. > (vaddq): Likewise. > (vaddq_n): Likewise. > (vandq): Likewise. > (vabdq): Likewise. > * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): > Use it. > (BINOP_NONE_NONE_NONE): Likewise. > (BINOP_NONE_NONE_UNONE): Likewise. > (BINOP_UNONE_NONE_IMM): Likewise. > (BINOP_UNONE_NONE_NONE): Likewise. > (BINOP_UNONE_UNONE_IMM): Likewise. > (BINOP_UNONE_UNONE_NONE): Likewise. > (BINOP_UNONE_UNONE_UNONE): Likewise. > * config/arm/constraints.md (Ra): Define constraint to check > constant is > in the range of 0 to 7. > (Rg): Define constriant to check the constant is one among 1, 2, 4 > and 8. > * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern. > (mve_vaddq_n_<supf>): Likewise. > (mve_vaddvaq_<supf>): Likewise. > (mve_vaddvq_p_<supf>): Likewise. > (mve_vandq_<supf>): Likewise. > (mve_vbicq_<supf>): Likewise. > (mve_vbrsrq_n_<supf>): Likewise. > (mve_vcaddq_rot270_<supf>): Likewise. > (mve_vcaddq_rot90_<supf>): Likewise. > (mve_vcmpcsq_n_u): Likewise. > (mve_vcmpcsq_u): Likewise. > (mve_vcmpeqq_n_<supf>): Likewise. > (mve_vcmpeqq_<supf>): Likewise. > (mve_vcmpgeq_n_s): Likewise. > (mve_vcmpgeq_s): Likewise. > (mve_vcmpgtq_n_s): Likewise. > (mve_vcmpgtq_s): Likewise. > (mve_vcmphiq_n_u): Likewise. > (mve_vcmphiq_u): Likewise. > (mve_vcmpleq_n_s): Likewise. > (mve_vcmpleq_s): Likewise. > (mve_vcmpltq_n_s): Likewise. > (mve_vcmpltq_s): Likewise. > (mve_vcmpneq_n_<supf>): Likewise. > (mve_vddupq_n_u): Likewise. > (mve_veorq_<supf>): Likewise. > (mve_vhaddq_n_<supf>): Likewise. > (mve_vhaddq_<supf>): Likewise. > (mve_vhcaddq_rot270_s): Likewise. > (mve_vhcaddq_rot90_s): Likewise. > (mve_vhsubq_n_<supf>): Likewise. > (mve_vhsubq_<supf>): Likewise. > (mve_vidupq_n_u): Likewise. > (mve_vmaxaq_s): Likewise. > (mve_vmaxavq_s): Likewise. > (mve_vmaxq_<supf>): Likewise. > (mve_vmaxvq_<supf>): Likewise. > (mve_vminaq_s): Likewise. > (mve_vminavq_s): Likewise. > (mve_vminq_<supf>): Likewise. > (mve_vminvq_<supf>): Likewise. > (mve_vmladavq_<supf>): Likewise. > (mve_vmladavxq_s): Likewise. > (mve_vmlsdavq_s): Likewise. > (mve_vmlsdavxq_s): Likewise. > (mve_vmulhq_<supf>): Likewise. > (mve_vmullbq_int_<supf>): Likewise. > (mve_vmulltq_int_<supf>): Likewise. > (mve_vmulq_n_<supf>): Likewise. > (mve_vmulq_<supf>): Likewise. > (mve_vornq_<supf>): Likewise. > (mve_vorrq_<supf>): Likewise. > (mve_vqaddq_n_<supf>): Likewise. > (mve_vqaddq_<supf>): Likewise. > (mve_vqdmulhq_n_s): Likewise. > (mve_vqdmulhq_s): Likewise. > (mve_vqrdmulhq_n_s): Likewise. > (mve_vqrdmulhq_s): Likewise. > (mve_vqrshlq_n_<supf>): Likewise. > (mve_vqrshlq_<supf>): Likewise. > (mve_vqshlq_n_<supf>): Likewise. > (mve_vqshlq_r_<supf>): Likewise. > (mve_vqshlq_<supf>): Likewise. > (mve_vqshluq_n_s): Likewise. > (mve_vqsubq_n_<supf>): Likewise. > (mve_vqsubq_<supf>): Likewise. > (mve_vrhaddq_<supf>): Likewise. > (mve_vrmulhq_<supf>): Likewise. > (mve_vrshlq_n_<supf>): Likewise. > (mve_vrshlq_<supf>): Likewise. > (mve_vrshrq_n_<supf>): Likewise. > (mve_vshlq_n_<supf>): Likewise. > (mve_vshlq_r_<supf>): Likewise. > (mve_vsubq_n_<supf>): Likewise. > (mve_vsubq_<supf>): Likewise. > * config/arm/predicates.md (mve_imm_7): Define predicate to check > the matching constraint Ra. > (mve_imm_selective_upto_8): Define predicate to check the > matching > constraint Rg. > > gcc/testsuite/ChangeLog: > > 2019-10-23 Andre Vieira <andre.simoesdiasvie...@arm.com> > Mihail Ionescu <mihail.ione...@arm.com> > Srinath Parvathaneni <srinath.parvathan...@arm.com> > > * gcc.target/arm/mve/intrinsics/vabdq_s16.c: New test. > * gcc.target/arm/mve/intrinsics/vabdq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vabdq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vabdq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vabdq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vabdq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddvaq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddvaq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddvaq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddvaq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddvaq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddvaq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vandq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vandq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vandq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vandq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vandq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vandq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmphiq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmphiq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmphiq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpleq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpleq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpleq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpltq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpltq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpltq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/veorq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/veorq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/veorq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/veorq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/veorq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/veorq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxaq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxaq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxaq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxavq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxavq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxavq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxvq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxvq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxvq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxvq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxvq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxvq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminaq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminaq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminaq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminavq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminavq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminavq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminvq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminvq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminvq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminvq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminvq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminvq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmladavq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmladavq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmladavq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmladavq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmladavq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmladavq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmladavxq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmladavxq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmladavxq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulhq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulhq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulhq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulhq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulhq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulhq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vornq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vornq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vornq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vornq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vornq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vornq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vorrq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vorrq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vorrq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vorrq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vorrq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vorrq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqaddq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqaddq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqaddq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqaddq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqaddq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqaddq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrshlq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrshlq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrshlq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrshlq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrshlq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqrshlq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqshlq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqshlq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqshlq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqshlq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqshlq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqshlq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqsubq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqsubq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqsubq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqsubq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqsubq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vqsubq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrhaddq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrhaddq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrhaddq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrhaddq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrhaddq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrhaddq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrmulhq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrmulhq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrmulhq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrmulhq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrmulhq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrmulhq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshlq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshlq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshlq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshlq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshlq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshlq_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_r_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_r_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_r_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_r_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_r_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_r_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_u8.c: Likewise.
