rs6000 - allow builtin initialization regardless of mask Hi, Disable the code that limits initialization of builtins based on the rs6000_builtin_mask. This allows all built-ins to be properly referenced when building code using #pragma for cpu targets newer than what was specified by the -mcpu default. The use of built-ins is still properly limited by logic within altivec_resolve_overloaded_builtin().
I'm still reviewing test results for any regressions. OK for master? Thanks, -Will 2020-03-23 Will Schmidt <will_schm...@vnet.ibm.com> gcc/ * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code to skip defining builtins based on builtin_mask. testsuite/ * gcc.target/powerpc/pragma6.c: New. * gcc.target/powerpc/pragma7.c: New. * gcc.target/powerpc/pragma8.c: New. * gcc.target/powerpc/pragma9.c: New. * gcc.target/powerpc/pragma_misc9.c: New. * gcc.target/powerpc/vsu/vec-all-nez-7.c: Update error message. * gcc.target/powerpc/vsu/vec-any-eqz-7.c: Update error message. diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c index 5906064..e08621a 100644 --- a/gcc/config/rs6000/rs6000-call.c +++ b/gcc/config/rs6000/rs6000-call.c @@ -12067,11 +12067,10 @@ altivec_init_builtins (void) { const struct builtin_description *d; size_t i; tree ftype; tree decl; - HOST_WIDE_INT builtin_mask = rs6000_builtin_mask; tree pvoid_type_node = build_pointer_type (void_type_node); tree pcvoid_type_node = build_pointer_type (build_qualified_type (void_type_node, @@ -12429,39 +12428,21 @@ altivec_init_builtins (void) /* Add the DST variants. */ d = bdesc_dst; for (i = 0; i < ARRAY_SIZE (bdesc_dst); i++, d++) { - HOST_WIDE_INT mask = d->mask; - /* It is expected that these dst built-in functions may have d->icode equal to CODE_FOR_nothing. */ - if ((mask & builtin_mask) != mask) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "altivec_init_builtins, skip dst %s\n", - d->name); - continue; - } def_builtin (d->name, void_ftype_pcvoid_int_int, d->code); } /* Initialize the predicates. */ d = bdesc_altivec_preds; for (i = 0; i < ARRAY_SIZE (bdesc_altivec_preds); i++, d++) { machine_mode mode1; tree type; - HOST_WIDE_INT mask = d->mask; - - if ((mask & builtin_mask) != mask) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "altivec_init_builtins, skip predicate %s\n", - d->name); - continue; - } if (rs6000_overloaded_builtin_p (d->code)) mode1 = VOIDmode; else { @@ -12504,19 +12485,10 @@ altivec_init_builtins (void) d = bdesc_abs; for (i = 0; i < ARRAY_SIZE (bdesc_abs); i++, d++) { machine_mode mode0; tree type; - HOST_WIDE_INT mask = d->mask; - - if ((mask & builtin_mask) != mask) - { - if (TARGET_DEBUG_BUILTIN) - fprintf (stderr, "altivec_init_builtins, skip abs %s\n", - d->name); - continue; - } /* Cannot define builtin if the instruction is disabled. */ gcc_assert (d->icode != CODE_FOR_nothing); mode0 = insn_data[d->icode].operand[0].mode; diff --git a/gcc/testsuite/gcc.target/powerpc/pragma_misc9.c b/gcc/testsuite/gcc.target/powerpc/pragma_misc9.c new file mode 100644 index 0000000..a861895 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pragma_misc9.c @@ -0,0 +1,47 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-mdejagnu-cpu=power9 -maltivec -O2" } */ + +/* Ensure that if we set a pragma gcc target for an + older processor, we do not compile builtins that + the older target does not support. */ + +#include <altivec.h> + +vector bool int +test1 (vector signed int a, vector signed int b) +{ + return vec_cmpnez (a, b); +} + +#pragma GCC target ("cpu=power8") +vector bool int +test2 (vector signed int a, vector signed int b) +{ + return vec_cmpnez (a, b); + /* { dg-error "'__builtin_altivec_vcmpnezw' requires the '-mcpu=power9' option" "" { target *-*-* } .-1 } */ +} + +#pragma GCC target ("cpu=power7") +vector signed int +test3 (vector signed int a, vector signed int b) +{ + return vec_mergee (a, b); + /* { dg-error "'__builtin_altivec_vmrgew_v4si' requires the '-mpower8-vector' option" "" { target *-*-* } .-1 } */ +} + +#pragma GCC target ("cpu=power6") +vector signed int +test4 (vector int a, vector int b) +{ + return vec_sldw (a, b, 2); + /* { dg-error "'__builtin_vsx_xxsldwi_4si' requires the '-mvsx' option" "" { target *-*-* } .-1 } */ +} + +vector int +test5 (vector int a, vector int b) +{ + return vec_add (a, b); +} + diff --git a/gcc/testsuite/gcc.target/powerpc/pragma_power6.c b/gcc/testsuite/gcc.target/powerpc/pragma_power6.c new file mode 100644 index 0000000..1dd858e --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pragma_power6.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-mdejagnu-cpu=power6 -maltivec -O2" } */ + +#include <altivec.h> + +#pragma GCC target ("cpu=power6,altivec") +#ifdef _ARCH_PWR6 +vector int +isa_2_05 (vector int a, vector int b) +{ + return vec_add (a, b); +} +#else +#error failed power6 pragma target +#endif + diff --git a/gcc/testsuite/gcc.target/powerpc/pragma_power7.c b/gcc/testsuite/gcc.target/powerpc/pragma_power7.c new file mode 100644 index 0000000..069ac01 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pragma_power7.c @@ -0,0 +1,32 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-mdejagnu-cpu=power6 -maltivec -O2" } */ + +#include <altivec.h> + +#pragma GCC target ("cpu=power6,altivec") +#ifdef _ARCH_PWR6 +vector int +test1 (vector int a, vector int b) +{ + return vec_add (a, b); +} +#else +#error failed power6 pragma target +#endif + +#pragma GCC target ("cpu=power7") +/* Force a re-read of altivec.h with new cpu target. */ +#undef _ALTIVEC_H +#include <altivec.h> +#ifdef _ARCH_PWR7 +vector signed int +test2 (vector signed int a, vector signed int b) +{ + return vec_sldw (a, b, 3); +} +#else +#error failed to set power7 pragma target +#endif + diff --git a/gcc/testsuite/gcc.target/powerpc/pragma_power8.c b/gcc/testsuite/gcc.target/powerpc/pragma_power8.c new file mode 100644 index 0000000..4894e43 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pragma_power8.c @@ -0,0 +1,52 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mdejagnu-cpu=power6 -maltivec -O2" } */ + +#include <altivec.h> + +#pragma GCC target ("cpu=power6,altivec") +#ifdef _ARCH_PWR6 +vector int +test1 (vector int a, vector int b) +{ + return vec_add (a, b); +} +#else +#error failed power6 pragma target +#endif + +#pragma GCC target ("cpu=power7") +/* Force a re-read of altivec.h with new cpu target. */ +#undef _ALTIVEC_H +#include <altivec.h> +#ifdef _ARCH_PWR7 +vector signed int +test2 (vector signed int a, vector signed int b) +{ + return vec_sldw (a, b, 3); +} +#else +#error failed to set power7 pragma target +#endif + +#pragma GCC target ("cpu=power8") +/* Force a re-read of altivec.h with new cpu target. */ +#undef _ALTIVEC_H +#include <altivec.h> +#ifdef _ARCH_PWR8 +vector int +test3 (vector int a, vector int b) +{ + return vec_mergee (a, b); +} +typedef __attribute__((altivec(vector__))) long vec_t; +int +test3b (vec_t a, vec_t b) +{ + return __builtin_vec_vcmpeq_p (2, a, b); +} +#else +#error failed to set power8 pragma target. +#endif + diff --git a/gcc/testsuite/gcc.target/powerpc/pragma_power9.c b/gcc/testsuite/gcc.target/powerpc/pragma_power9.c new file mode 100644 index 0000000..25dfc8b --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pragma_power9.c @@ -0,0 +1,63 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-mdejagnu-cpu=power6 -maltivec -O2" } */ + +#include <altivec.h> + +#ifdef _ARCH_PWR6 +vector int +test1 (vector int a, vector int b) +{ + return vec_add (a, b); +} +#else +#error failed on default power6 pragma target +#endif + +#pragma GCC target ("cpu=power7") +#undef _ALTIVEC_H +#include <altivec.h> +#ifdef _ARCH_PWR7 +vector signed int +test2 (vector signed int a, vector signed int b) +{ + return vec_sldw (a, b, 3); +} +#else +#error failed to set power7 pragma target +#endif + +#pragma GCC target ("cpu=power8") +#undef _ALTIVEC_H +#include <altivec.h> +#ifdef _ARCH_PWR8 +vector int +test3 (vector int a, vector int b) +{ + return vec_mergee (a, b); +} + +typedef __attribute__((altivec(vector__))) long vec_t; +int +test3b (vec_t a, vec_t b) +{ + return __builtin_vec_vcmpeq_p (2, a, b); +} +#else +#error failed to set power8 pragma target. +#endif + +#pragma GCC target ("cpu=power9,power9-vector") +#undef _ALTIVEC_H +#include <altivec.h> +#ifdef _ARCH_PWR9 +vector bool int +test4 (vector signed int a, vector signed int b) +{ + return vec_cmpnez (a, b); +} +#else +#error Failed to set cpu=power9 pragma target. +#endif + diff --git a/gcc/testsuite/gcc.target/powerpc/vsu/vec-all-nez-7.c b/gcc/testsuite/gcc.target/powerpc/vsu/vec-all-nez-7.c index 0f9badd..f53c6dc 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsu/vec-all-nez-7.c +++ b/gcc/testsuite/gcc.target/powerpc/vsu/vec-all-nez-7.c @@ -9,7 +9,8 @@ test_all_not_equal_and_not_zero (vector unsigned short *arg1_p, vector unsigned short *arg2_p) { vector unsigned short arg_1 = *arg1_p; vector unsigned short arg_2 = *arg2_p; - return __builtin_vec_vcmpnez_p (__CR6_LT, arg_1, arg_2); /* { dg-error "'__builtin_vec_vcmpnez_p' is not supported in this compiler configuration" } */ + return __builtin_vec_vcmpnez_p (__CR6_LT, arg_1, arg_2); + /* { dg-error "'__builtin_altivec_vcmpnezh_p' requires the '-mcpu=power9' option" "" { target *-*-* } .-1 } */ } diff --git a/gcc/testsuite/gcc.target/powerpc/vsu/vec-any-eqz-7.c b/gcc/testsuite/gcc.target/powerpc/vsu/vec-any-eqz-7.c index c69dfa6..757acd9 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsu/vec-any-eqz-7.c +++ b/gcc/testsuite/gcc.target/powerpc/vsu/vec-any-eqz-7.c @@ -8,7 +8,8 @@ int test_any_equal (vector unsigned int *arg1_p, vector unsigned int *arg2_p) { vector unsigned int arg_1 = *arg1_p; vector unsigned int arg_2 = *arg2_p; - return __builtin_vec_vcmpnez_p (__CR6_LT_REV, arg_1, arg_2); /* { dg-error "'__builtin_vec_vcmpnez_p' is not supported in this compiler configuration" } */ + return __builtin_vec_vcmpnez_p (__CR6_LT_REV, arg_1, arg_2); + /* { dg-error "'__builtin_altivec_vcmpnezw_p' requires the '-mcpu=power9' option" "" { target *-*-* } .-1 } */ }