Hi Alex,
> -----Original Message-----
> From: Alex Coplan <alex.cop...@arm.com>
> Sent: 22 April 2020 21:41
> To: gcc-patches@gcc.gnu.org
> Cc: Richard Earnshaw <richard.earns...@arm.com>; Richard Sandiford
> <richard.sandif...@arm.com>; Marcus Shawcroft
> <marcus.shawcr...@arm.com>; Kyrylo Tkachov <kyrylo.tkac...@arm.com>;
> nd <n...@arm.com>
> Subject: [PATCH] aarch64: eliminate redundant zero extend after bitwise
> negation
>
> Hello,
>
> The attached patch eliminates a redundant zero extend from the AArch64
> backend. Given the following C code:
>
> unsigned long long foo(unsigned a)
> {
> return ~a;
> }
>
> prior to this patch, AArch64 GCC at -O2 generates:
>
> foo:
> mvn w0, w0
> uxtw x0, w0
> ret
>
> but the uxtw is redundant, since the mvn clears the upper half of the x0
> register. After applying this patch, GCC at -O2 gives:
>
> foo:
> mvn w0, w0
> ret
>
> Testing:
> Added regression test which passes after applying the change to
> aarch64.md.
> Full bootstrap and regression on aarch64-linux with no additional
> failures.
>
Thanks, this patch is ok.
However, GCC 10 is now in stage 4, so I'll defer committing it until stage 1
reopens (hopefully not long to go!)
If I do not commit it in the first few weeks of stage 1 feel free to ping me.
Kyrill
> Thanks,
> Alex
>
> ---
>
> gcc/ChangeLog:
>
> 2020-04-22 Alex Coplan <alex.cop...@arm.com>
>
> * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
>
> gcc/testsuite/ChangeLog:
>
> 2020-04-22 Alex Coplan <alex.cop...@arm.com>
>
> * gcc.target/aarch64/mvn_zero_ext.c: New test.
