Hey all-apologies for the long delay. Haven't had time until recently to look into this further. >>> The zero extract now matching against other modes would generate a >>> test + branch rather than the combined instruction which led to the >>> code size regression. I've updated the patch so that tbnz etc. matches GPI >>> and >>that brings code size down to <0.2% in spec2017 and <0.4% in spec2006. >> >>That's looking better indeed. I notice there are still differences, eg. >>tbz/tbnz >>counts are significantly different in perlbench, with ~350 missed cases >>overall >>(mostly tbz reg, #7). >> >>There are also more uses of uxtw, ubfiz, sbfiz - for example I see cases like >>this >>in namd: >> >> 42c7dc: 13007400 sbfx w0, w0, #0, #30 >> 42c7e0: 937c7c00 sbfiz x0, x0, #4, #32 >> >>So it would be a good idea to check any benchmarks where there is still a non- >>trivial codesize difference. You can get a quick idea what is happening by >>grepping for instructions like this: >> >>grep -c sbfiz out1.txt out2.txt >>out1.txt:872 >>out2.txt:934 >> >>grep -c tbnz out1.txt out2.txt >>out1.txt:5189 >>out2.txt:4989
That's really good insight Wilco! I took a look at the tbnz/tbz case in perl
and we lose matching against this because allowing SI mode on extv/extzv causes
subst in combine.c to generate:
(lshiftrt:SI (reg:SI 107 [ _16 ])
(const_int 7 [0x7]))
(nil)
Instead of:
(and:DI (lshiftrt:DI (subreg:DI (reg:SI 107 [ _16 ]) 0)
(const_int 7 [0x7]))
(const_int 1 [0x1]))
The latter case is picked up in make_compound_operation_int to transform into a
zero_extract while the new case is left alone. A lshiftrt generally can't be
reduced down to a bit-test but in this case it can because we have zero_bit
information on it. Given that, looking around try_combine it seems like the
best place to detect this pattern is in the 2nd chance code after the first
failure of recog_for_combine which I've done in this patch. I think this is the
place to put this fix given changing subst/make_compound_operation_int leads to
significantly more diffs.
After this change the total number of tbnz/tbz lines up near identical to the
baseline which is good and overall size within .1% on spec 2017 and spec 2006.
However, looking further at ubfiz there's a pretty large increase in certain
benchmarks. I looked into spec 2017/blender and we fail to combine this pattern:
Trying 653 -> 654:
653: r512:SI=r94:SI 0>>0x8
REG_DEAD r94:SI
654: r513:DI=zero_extend(r512:SI)
REG_DEAD r512:SI
Failed to match this instruction:
(set (reg:DI 513)
(zero_extract:DI (reg:SI 94 [ bswapdst_4 ])
(const_int 8 [0x8])
(const_int 8 [0x8])))
Where previously we combined it like this:
Trying 653 -> 654:
653: r512:SI=r94:SI 0>>0x8
REG_DEAD r94:SI
654: r513:DI=zero_extend(r512:SI)
REG_DEAD r512:SI
Successfully matched this instruction:
(set (reg:DI 513)
(zero_extract:DI (subreg:DI (reg:SI 94 [ bswapdst_4 ]) 0) // subreg used
(const_int 8 [0x8])
(const_int 8 [0x8])))
Here's where I'm at an impasse. The code that generates the modes in
get_best_reg_extraction_insn looks at the inner mode of SI now that extzvsi is
valid and generates a non-subreg use. However, the MD pattern is looking for
all modes being DI or SI not a mix. I think a fix could be done to canonicalize
these extracts to the same mode but am unsure if in general a mode mismatched
extract RTX is valid which would make this a fairly large change.
Latest patch with fix for tbnz/tbz is attached alongside the numbers for SPEC
and instruction count for SPEC 2017 are attached for reference.
>>> Can you send me the necessary documents to make that happen? Thanks!
>>
>>That's something you need to sort out with the fsf. There is a mailing list
>>for this:
>>mailto:ass...@gnu.org.
I haven't had any response from my previous mail there. Should I add one of you
to the CC or mail someone specifically to get traction?
Best,
Modi
pr86901.patch
Description: pr86901.patch
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ubfiz uxtw sxtw
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2 4442 4444 2 215 215 0 322 323 1
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