Alex Coplan <[email protected]> writes:
>> -----Original Message-----
>> From: Richard Sandiford <[email protected]>
>> Sent: 30 April 2020 15:13
>> To: Alex Coplan <[email protected]>
>> Cc: [email protected]; Richard Earnshaw <[email protected]>;
>> Marcus Shawcroft <[email protected]>; Kyrylo Tkachov
>> <[email protected]>; nd <[email protected]>
>> Subject: Re: [PATCH] aarch64: prefer using csinv, csneg in zero extend
>> contexts
>>
>> Yeah, I was hoping for something like...
>>
>> > Indeed, clang generates a MVN + CSEL sequence where the CSEL operates on
>> > the
>> > 64-bit registers:
>> >
>> > f:
>> > mvn w8, w2
>> > cmp w0, #0
>> > csel x0, x8, x1, eq
>> > ret
>>
>> ...this rather than the 4-insn (+ret) sequence that we currently
>> generate. So it would have been a define_insn_and_split that handles
>> the zero case directly but splits into the "optimal" two-instruction
>> sequence for registers.
>>
>> But I guess the underlying problem is instead that we don't have
>> a pattern for (zero_extend:DI (not:SI ...)). Adding that would
>> definitely be a better fix.
>
> Yes. I sent a patch for this very fix which Kyrill is going to commit once
> stage
> 1 opens: https://gcc.gnu.org/pipermail/gcc-patches/2020-April/544365.html
Sorry, missed that.
It looks like that patch hinders this one though. Trying it with
current master (where that patch is applied), I get:
FAIL: gcc.target/aarch64/csinv-neg.c check-function-bodies inv_zero1
FAIL: gcc.target/aarch64/csinv-neg.c check-function-bodies inv_zero2
It looks like a costs issue:
Trying 27 -> 18:
27: r99:DI=zero_extend(~r101:SI)
REG_DEAD r101:SI
18: x0:DI={(cc:CC==0)?r99:DI:0}
REG_DEAD cc:CC
REG_DEAD r99:DI
Successfully matched this instruction:
(set (reg/i:DI 0 x0)
(if_then_else:DI (eq (reg:CC 66 cc)
(const_int 0 [0]))
(zero_extend:DI (not:SI (reg:SI 101)))
(const_int 0 [0])))
rejecting combination of insns 27 and 18
original costs 4 + 4 = 8
replacement cost 12
I guess we'll need to teach aarch64_if_then_else_costs about the costs
of the new insns.
Thanks,
Richard
