From: Kelvin Nilsen <kel...@gcc.gnu.org>
Add scalar instructions for parallel bit deposit and extract, with
built-in function support.
Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
regressions. Is this okay for master?
Thanks,
Bill
[gcc]
2020-05-08 Kelvin Nilsen <kel...@gcc.gnu.org>
* config/rs6000/altivec.h (vec_clrl): New #define.
(vec_clrr): Likewise.
* config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant.
(UNSPEC_VCLRRB): Likewise.
(vclrlb): New insn.
(vclrrb): Likewise.
* config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New
built-in function.
(__builtin_altivec_vclrrb): Likewise.
(__builtin_vec_clrl): New overloaded built-in function.
(__builtin_vec_clrr): Likewise.
* config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
Define overloaded forms of __builtin_vec_clrl and
__builtin_vec_clrr.
* doc/extend.texi (PowerPC AltiVec Built-in Functions Available
for a Future Architecture): Add descriptions of vec_clrl and
vec_clrr.
[gcc/testsuite]
2020-05-08 Kelvin Nilsen <kel...@gcc.gnu.org>
* gcc.target/powerpc/vec-clrl-0.c: New.
* gcc.target/powerpc/vec-clrl-1.c: New.
* gcc.target/powerpc/vec-clrr-0.c: New.
* gcc.target/powerpc/vec-clrr-1.c: New.
---
gcc/config/rs6000/rs6000-builtin.def | 2 +
gcc/config/rs6000/rs6000.md | 20 +++++++++
gcc/doc/extend.texi | 16 +++++++
gcc/testsuite/gcc.target/powerpc/pdep-0.c | 48 +++++++++++++++++++++
gcc/testsuite/gcc.target/powerpc/pdep-1.c | 48 +++++++++++++++++++++
gcc/testsuite/gcc.target/powerpc/pextd-0.c | 50 ++++++++++++++++++++++
gcc/testsuite/gcc.target/powerpc/pextd-1.c | 49 +++++++++++++++++++++
7 files changed, 233 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/powerpc/pdep-0.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pdep-1.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pextd-0.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pextd-1.c
diff --git a/gcc/config/rs6000/rs6000-builtin.def
b/gcc/config/rs6000/rs6000-builtin.def
index 39e7da5fa50..4b06323a07f 100644
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -2577,6 +2577,8 @@ BU_P9_OVERLOAD_2 (CMPEQB, "byte_in_set")
BU_FUTURE_MISC_2 (CFUGED, "cfuged", CONST, cfuged)
BU_FUTURE_MISC_2 (CNTLZDM, "cntlzdm", CONST, cntlzdm)
BU_FUTURE_MISC_2 (CNTTZDM, "cnttzdm", CONST, cnttzdm)
+BU_FUTURE_MISC_2 (PDEPD, "pdepd", CONST, pdepd)
+BU_FUTURE_MISC_2 (PEXTD, "pextd", CONST, pextd)
/* Future architecture vector built-ins. */
BU_FUTURE_V_2 (VCLRLB, "vclrlb", CONST, vclrlb)
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index def48204f86..25af555a0fb 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -151,6 +151,8 @@ (define_c_enum "unspec"
UNSPEC_CFUGED
UNSPEC_CNTLZDM
UNSPEC_CNTTZDM
+ UNSPEC_PDEPD
+ UNSPEC_PEXTD
])
;;
@@ -2483,6 +2485,24 @@ (define_insn "cnttzdm"
"cnttzdm %0,%1,%2"
[(set_attr "type" "integer")])
+(define_insn "pdepd"
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (unspec:DI [(match_operand:DI 1 "gpc_reg_operand" "r")
+ (match_operand:DI 2 "gpc_reg_operand" "r")]
+ UNSPEC_PDEPD))]
+ "TARGET_FUTURE && TARGET_POWERPC64"
+ "pdepd %0,%1,%2"
+ [(set_attr "type" "integer")])
+
+(define_insn "pextd"
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (unspec:DI [(match_operand:DI 1 "gpc_reg_operand" "r")
+ (match_operand:DI 2 "gpc_reg_operand" "r")]
+ UNSPEC_PEXTD))]
+ "TARGET_FUTURE && TARGET_POWERPC64"
+ "pextd %0,%1,%2"
+ [(set_attr "type" "integer")])
+
(define_insn "cmpb<mode>3"
[(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
(unspec:GPR [(match_operand:GPR 1 "gpc_reg_operand" "r")
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 104397823b0..9602a310cbb 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -17572,6 +17572,22 @@ Perform a 64-bit count trailing zeros operation under
mask, as if
implemented by the future @code{cnttzdm} instruction.
@findex __builtin_cnttzdm
+@smallexample
+@exdent unsigned long long int
+@exdent __builtin_pdepd (unsigned long long int, unsigned long long int)
+@end smallexample
+Perform a 64-bit parallel bits deposit operation, as if implemented by the
+Future @code{pdepd} instruction.
+@findex __builtin_pdepd
+
+@smallexample
+@exdent unsigned long long int
+@exdent __builtin_pextd (unsigned long long int, unsigned long long int)
+@end smallexample
+Perform a 64-bit parallel bits extract operation, as if implemented by the
+Future @code{pextd} instruction.
+@findex __builtin_pextd
+
@node PowerPC AltiVec/VSX Built-in Functions
@subsection PowerPC AltiVec/VSX Built-in Functions
diff --git a/gcc/testsuite/gcc.target/powerpc/pdep-0.c
b/gcc/testsuite/gcc.target/powerpc/pdep-0.c
new file mode 100644
index 00000000000..5c6afb33169
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pdep-0.c
@@ -0,0 +1,48 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc64 } */
+/* { dg-options "-mcpu=future" } */
+
+extern void abort (void);
+
+unsigned long long int
+do_pdepd (unsigned long long int source, unsigned long long int mask) {
+ return __builtin_pdepd (source, mask);
+}
+
+int main (int argc, char *argv [])
+{
+ unsigned long long int sources [4], masks [4];
+ unsigned long long int results [4][4] = {
+ /* sources [0] with each of masks [0..3] */
+ { 0x7e3c0000ll, 0x00007e3cll, 0x070e030cll, 0x70e030c0ll },
+ /* sources [1] with each of masks [0..3] */
+ { 0xa5f00000ll, 0x0000a5f0ll, 0x0a050f00ll, 0xa050f000ll },
+ /* sources [2] with each of masks [0..3] */
+ { 0xf07e0000ll, 0x0000f07ell, 0x0f00070ell, 0xf00070e0ll },
+ /* sources [3] with each of masks [0..3] */
+ { 0xe7c30000ll, 0x0000e7c3ll, 0x0e070c03ll, 0xe070c030ll },
+ };
+
+ sources[0] = 0xa5f07e3cll;
+ sources[1] = 0x7e3ca5f0ll;
+ sources[2] = 0x3ca5f07ell;
+ sources[3] = 0x5a0fe7c3ll;
+
+ masks[0] = 0xffff0000ll;
+ masks[1] = 0x0000ffffll;
+ masks[2] = 0x0f0f0f0fll;
+ masks[3] = 0xf0f0f0f0ll;
+
+ for (int i = 0; i < 4; i++)
+ {
+ for (int j = 0; j < 4; j++)
+ {
+ if (do_pdepd (sources[i], masks[j]) != results [i][j])
+ abort ();
+ }
+ }
+
+ return 0;
+}
+
+/* { dg-final { scan-assembler {\mpdepd\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pdep-1.c
b/gcc/testsuite/gcc.target/powerpc/pdep-1.c
new file mode 100644
index 00000000000..40532ee1177
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pdep-1.c
@@ -0,0 +1,48 @@
+/* { dg-do run } */
+/* { dg-require-effective-target powerpc_future_hw } */
+/* { dg-require-effective-target powerpc64 } */
+/* { dg-options "-mcpu=future" } */
+
+extern void abort (void);
+
+unsigned long long int
+do_pdepd (unsigned long long int source, unsigned long long int mask) {
+ return __builtin_pdepd (source, mask);
+}
+
+int main (int argc, char *argv [])
+{
+ unsigned long long int sources [4], masks [4];
+ unsigned long long int results [4][4] = {
+ /* sources [0] with each of masks [0..3] */
+ { 0x7e3c0000ll, 0x00007e3cll, 0x070e030cll, 0x70e030c0ll },
+ /* sources [1] with each of masks [0..3] */
+ { 0xa5f00000ll, 0x0000a5f0ll, 0x0a050f00ll, 0xa050f000ll },
+ /* sources [2] with each of masks [0..3] */
+ { 0xf07e0000ll, 0x0000f07ell, 0x0f00070ell, 0xf00070e0ll },
+ /* sources [3] with each of masks [0..3] */
+ { 0xe7c30000ll, 0x0000e7c3ll, 0x0e070c03ll, 0xe070c030ll },
+ };
+
+ sources[0] = 0xa5f07e3cll;
+ sources[1] = 0x7e3ca5f0ll;
+ sources[2] = 0x3ca5f07ell;
+ sources[3] = 0x5a0fe7c3ll;
+
+ masks[0] = 0xffff0000ll;
+ masks[1] = 0x0000ffffll;
+ masks[2] = 0x0f0f0f0fll;
+ masks[3] = 0xf0f0f0f0ll;
+
+ for (int i = 0; i < 4; i++)
+ {
+ for (int j = 0; j < 4; j++)
+ {
+ if (do_pdepd (sources[i], masks[j]) != results [i][j])
+ abort ();
+ }
+ }
+
+ return 0;
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/pextd-0.c
b/gcc/testsuite/gcc.target/powerpc/pextd-0.c
new file mode 100644
index 00000000000..23a952dc2c6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pextd-0.c
@@ -0,0 +1,50 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc64 } */
+/* { dg-options "-mcpu=future" } */
+
+extern void abort (void);
+
+unsigned long long int
+do_pextd (unsigned long long int source, unsigned long long int mask) {
+ return __builtin_pextd (source, mask);
+}
+
+int main (int argc, char *argv [])
+{
+ unsigned long long int sources [4], masks [4];
+ unsigned long long int results [4][4] = {
+ /* sources [0] with each of masks [0..3] */
+ { 0x0000a5f0ll, 0x00007e3cll, 0x000050ecll, 0x0000af73ll },
+ /* sources [1] with each of masks [0..3] */
+ { 0x00007e3cll, 0x0000a5f0ll, 0x0000ec50ll, 0x000073afll },
+ /* sources [2] with each of masks [0..3] */
+ { 0x00003ca5ll, 0x0000f07ell, 0x0000c50ell, 0x00003af7ll },
+ /* sources [3] with each of masks [0..3] */
+ { 0x00005a0fll, 0x0000e7c3ll, 0x0000af73ll, 0x000050ecll },
+ };
+
+ sources[0] = 0xa5f07e3cll;
+ sources[1] = 0x7e3ca5f0ll;
+ sources[2] = 0x3ca5f07ell;
+ sources[3] = 0x5a0fe7c3ll;
+
+ masks[0] = 0xffff0000ll;
+ masks[1] = 0x0000ffffll;
+ masks[2] = 0x0f0f0f0fll;
+ masks[3] = 0xf0f0f0f0ll;
+
+ unsigned long long int result;
+
+ for (int i = 0; i < 4; i++)
+ {
+ for (int j = 0; j < 4; j++)
+ {
+ if (do_pextd (sources[i], masks[j]) != results [i][j])
+ abort ();
+ }
+ }
+
+ return 0;
+}
+
+/* { dg-final { scan-assembler {\mpextd\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pextd-1.c
b/gcc/testsuite/gcc.target/powerpc/pextd-1.c
new file mode 100644
index 00000000000..814ce4325a0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pextd-1.c
@@ -0,0 +1,49 @@
+/* { dg-do run } */
+/* { dg-require-effective-target powerpc_future_hw } */
+/* { dg-require-effective-target powerpc64 } */
+/* { dg-options "-mcpu=future" } */
+
+extern void abort (void);
+
+unsigned long long int
+do_pextd (unsigned long long int source, unsigned long long int mask) {
+ return __builtin_pextd (source, mask);
+}
+
+int main (int argc, char *argv [])
+{
+ unsigned long long int sources [4], masks [4];
+ unsigned long long int results [4][4] = {
+ /* sources [0] with each of masks [0..3] */
+ { 0x0000a5f0ll, 0x00007e3cll, 0x000050ecll, 0x0000af73ll },
+ /* sources [1] with each of masks [0..3] */
+ { 0x00007e3cll, 0x0000a5f0ll, 0x0000ec50ll, 0x000073afll },
+ /* sources [2] with each of masks [0..3] */
+ { 0x00003ca5ll, 0x0000f07ell, 0x0000c50ell, 0x00003af7ll },
+ /* sources [3] with each of masks [0..3] */
+ { 0x00005a0fll, 0x0000e7c3ll, 0x0000af73ll, 0x000050ecll },
+ };
+
+ sources[0] = 0xa5f07e3cll;
+ sources[1] = 0x7e3ca5f0ll;
+ sources[2] = 0x3ca5f07ell;
+ sources[3] = 0x5a0fe7c3ll;
+
+ masks[0] = 0xffff0000ll;
+ masks[1] = 0x0000ffffll;
+ masks[2] = 0x0f0f0f0fll;
+ masks[3] = 0xf0f0f0f0ll;
+
+ unsigned long long int result;
+
+ for (int i = 0; i < 4; i++)
+ {
+ for (int j = 0; j < 4; j++)
+ {
+ if (do_pextd (sources[i], masks[j]) != results [i][j])
+ abort ();
+ }
+ }
+
+ return 0;
+}
