Now with missing testcase.
On Mon, May 11, 2020 at 11:20 AM Uros Bizjak <ubiz...@gmail.com> wrote:
>
> Enable V2SFmode vectorization and vectorize V2SFmode PLUS,
> MINUS, MULT, MIN and MAX operations using XMM registers.
>
> To avoid unwanted secondary effects (e.g. exceptions), load values
> to XMM registers using MOVQ that clears high bits of the XMM
> register outside V2SFmode.
>
> The compiler now vectorizes e.g.:
>
> float r[2], a[2], b[2];
>
> void
> test_plus (void)
> {
> for (int i = 0; i < 2; i++)
> r[i] = a[i] + b[i];
> }
>
> to:
> movq a(%rip), %xmm0
> movq b(%rip), %xmm1
> addps %xmm1, %xmm0
> movlps %xmm0, r(%rip)
> ret
>
> gcc/ChangeLog:
>
> 2020-05-11 Uroš Bizjak <ubiz...@gmail.com>
>
> PR target/95046
> * config/i386/i386.c (ix86_vector_mode_supported_p):
> Vectorize 3dNOW! vector modes for TARGET_MMX_WITH_SSE.
> * config/i386/mmx.md (*mov<mode>_internal): Do not set
> mode of alternative 13 to V2SF for TARGET_MMX_WITH_SSE.
>
> (mmx_addv2sf3): Change operand predicates from
> nonimmediate_operand to register_mmxmem_operand.
> (addv2sf3): New expander.
> (*mmx_addv2sf3): Add SSE/AVX alternatives. Change operand
> predicates from nonimmediate_operand to register_mmxmem_operand.
> Enable instruction pattern for TARGET_MMX_WITH_SSE.
>
> (mmx_subv2sf3): Change operand predicate from
> nonimmediate_operand to register_mmxmem_operand.
> (mmx_subrv2sf3): Ditto.
> (subv2sf3): New expander.
> (*mmx_subv2sf3): Add SSE/AVX alternatives. Change operand
> predicates from nonimmediate_operand to register_mmxmem_operand.
> Enable instruction pattern for TARGET_MMX_WITH_SSE.
>
> (mmx_mulv2sf3): Change operand predicates from
> nonimmediate_operand to register_mmxmem_operand.
> (mulv2sf3): New expander.
> (*mmx_mulv2sf3): Add SSE/AVX alternatives. Change operand
> predicates from nonimmediate_operand to register_mmxmem_operand.
> Enable instruction pattern for TARGET_MMX_WITH_SSE.
>
> (mmx_<code>v2sf3): Change operand predicates from
> nonimmediate_operand to register_mmxmem_operand.
> (<code>v2sf3): New expander.
> (*mmx_<code>v2sf3): Add SSE/AVX alternatives. Change operand
> predicates from nonimmediate_operand to register_mmxmem_operand.
> Enable instruction pattern for TARGET_MMX_WITH_SSE.
> (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
>
> testsuite/ChangeLog:
>
> 2020-05-11 Uroš Bizjak <ubiz...@gmail.com>
>
> PR target/95046
> * gcc.target/i386/pr95046-1.c: New test.
>
> Bootstrapped and regression tested on x86_64-linux-gnu {-m32}.
>
> Committed to mainline.
>
> Uros.
/* PR target/94942 */
/* { dg-do compile { target { ! ia32 } } } */
/* { dg-options "-O3 -ffast-math -msse2" } */
float r[2], a[2], b[2];
void
test_plus (void)
{
for (int i = 0; i < 2; i++)
r[i] = a[i] + b[i];
}
/* { dg-final { scan-assembler "addps" } } */
void
test_minus (void)
{
for (int i = 0; i < 2; i++)
r[i] = a[i] - b[i];
}
/* { dg-final { scan-assembler "subps" } } */
void
test_mult (void)
{
for (int i = 0; i < 2; i++)
r[i] = a[i] * b[i];
}
/* { dg-final { scan-assembler "mulps" } } */
void
test_min (void)
{
for (int i = 0; i < 2; i++)
r[i] = a[i] < b[i] ? a[i] : b[i];
}
/* { dg-final { scan-assembler "minps" } } */
void
test_max (void)
{
for (int i = 0; i < 2; i++)
r[i] = a[i] > b[i] ? a[i] : b[i];
}
/* { dg-final { scan-assembler "maxps" } } */
