ping

On Wed, Jul 22, 2020 at 3:57 PM Hongtao Liu <crazy...@gmail.com> wrote:
>
>   Bootstrap is ok, regression test is ok for i386 backend.
>
> gcc/
>         PR target/96262
>         * config/i386/i386-expand.c
>         (ix86_expand_vec_shift_qihi_constant): Refine.
>
> gcc/testsuite/
>         * gcc.target/i386/pr96262-1.c: New test.
>
> ---
>  gcc/config/i386/i386-expand.c             |  6 +++---
>  gcc/testsuite/gcc.target/i386/pr96262-1.c | 11 +++++++++++
>  2 files changed, 14 insertions(+), 3 deletions(-)
>  create mode 100644 gcc/testsuite/gcc.target/i386/pr96262-1.c
>
> diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c
> index e194214804b..d57d043106a 100644
> --- a/gcc/config/i386/i386-expand.c
> +++ b/gcc/config/i386/i386-expand.c
> @@ -19537,7 +19537,7 @@ bool
>  ix86_expand_vec_shift_qihi_constant (enum rtx_code code, rtx dest,
> rtx op1, rtx op2)
>  {
>    machine_mode qimode, himode;
> -  unsigned int and_constant, xor_constant;
> +  HOST_WIDE_INT and_constant, xor_constant;
>    HOST_WIDE_INT shift_amount;
>    rtx vec_const_and, vec_const_xor;
>    rtx tmp, op1_subreg;
> @@ -19612,7 +19612,7 @@ ix86_expand_vec_shift_qihi_constant (enum
> rtx_code code, rtx dest, rtx op1, rtx
>    emit_move_insn (dest, simplify_gen_subreg (qimode, tmp, himode, 0));
>    emit_move_insn (vec_const_and,
>                   ix86_build_const_vector (qimode, true,
> -                                          GEN_INT (and_constant)));
> +                                          gen_int_mode (and_constant,
> QImode)));
>    emit_insn (gen_and (dest, dest, vec_const_and));
>
>    /* For ASHIFTRT, perform extra operation like
> @@ -19623,7 +19623,7 @@ ix86_expand_vec_shift_qihi_constant (enum
> rtx_code code, rtx dest, rtx op1, rtx
>        vec_const_xor = gen_reg_rtx (qimode);
>        emit_move_insn (vec_const_xor,
>                       ix86_build_const_vector (qimode, true,
> -                                              GEN_INT (xor_constant)));
> +                                              gen_int_mode
> (xor_constant, QImode)));
>        emit_insn (gen_xor (dest, dest, vec_const_xor));
>        emit_insn (gen_sub (dest, dest, vec_const_xor));
>      }
> diff --git a/gcc/testsuite/gcc.target/i386/pr96262-1.c
> b/gcc/testsuite/gcc.target/i386/pr96262-1.c
> new file mode 100644
> index 00000000000..1825388072e
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/pr96262-1.c
> @@ -0,0 +1,11 @@
> +/* PR target/96262 */
> +/* { dg-do compile } */
> +/* { dg-options "-mavx512bw -O" } */
> +
> +typedef char __attribute__ ((__vector_size__ (64))) V;
> +
> +V
> +foo (V v)
> +{
> +  return ~(v << 1);
> +}
> --
>
> --
> BR,
> Hongtao



-- 
BR,
Hongtao

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