ping On Wed, Jul 22, 2020 at 12:59 PM Hongtao Liu <crazy...@gmail.com> wrote: > > Those two define_insns have same pattern, and > <avx512>_load<mode>_mask would always be matched since it show up > earlier in the md file, and it may lose some opportunity in > pass_reload since <avx512>_load<mode>_mask only have constraint "0C" > for operand2, and "v" constraint in <avx512>_vblendm<mode> would never > be matched. > > 2020-07-21 Hongtao Liu <hongtao....@intel.com> > > gcc/ > PR target/96246 > * config/i386/sse.md (<avx512>_load<mode>_mask, > <avx512>_load<mode>_mask): Extend to generate blendm > instructions. > (<avx512>_blendm<mode>, <avx512>_blendm<mode>): Change > define_insn to define_expand. > > gcc/testsuite/ > * gcc.target/i386/avx512bw-pr96246-1.c: New test. > * gcc.target/i386/avx512bw-pr96246-2.c: New test. > * gcc.target/i386/avx512vl-pr96246-1.c: New test. > * gcc.target/i386/avx512vl-pr96246-2.c: New test. > * gcc.target/i386/avx512bw-vmovdqu16-1.c: New test. > * gcc.target/i386/avx512bw-vmovdqu8-1.c: New test. > * gcc.target/i386/avx512f-vmovapd-1.c: New test. > * gcc.target/i386/avx512f-vmovaps-1.c: New test. > * gcc.target/i386/avx512f-vmovdqa32-1.c: New test. > * gcc.target/i386/avx512f-vmovdqa64-1.c: New test. > * gcc.target/i386/avx512vl-pr92686-movcc-1.c: New test. > * gcc.target/i386/avx512vl-pr96246-1.c: New test. > * gcc.target/i386/avx512vl-pr96246-2.c: New test. > * gcc.target/i386/avx512vl-vmovapd-1.c: New test. > * gcc.target/i386/avx512vl-vmovaps-1.c: New test. > * gcc.target/i386/avx512vl-vmovdqa32-1.c: New test. > * gcc.target/i386/avx512vl-vmovdqa64-1.c: New test. > > > -- > BR, > Hongtao
-- BR, Hongtao