Hi, Richard,
At the same time testing aarch64, I also tested the default implementation on
rs6000 target.
The default implementation now is:
+/* The default hook for TARGET_ZERO_CALL_USED_REGS. */
+
+HARD_REG_SET
+default_zero_call_used_regs (HARD_REG_SET need_zeroed_hardregs)
+{
+ gcc_assert (!hard_reg_set_empty_p (need_zeroed_hardregs));
+
+ for (unsigned int regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
+ if (TEST_HARD_REG_BIT (need_zeroed_hardregs, regno))
+ {
+ machine_mode mode = reg_raw_mode[regno];
+ rtx reg = gen_rtx_REG (mode, regno);
+ emit_move_insn (reg, const0_rtx);
+ }
+ return need_zeroed_hardregs;
+}
+
With the small testing case:
int
test ()
{
return 1;
}
If I compiled it with
/home/qinzhao/Install/latest/bin/gcc -O2 -fzero-call-used-regs=all-arg t.c
It will failed as:
t.c: In function ‘test’:
t.c:6:1: error: insn does not satisfy its constraints:
6 | }
| ^
(insn 28 27 29 (set (reg:DI 33 1)
(const_int 0 [0])) "t.c":6:1 647 {*movdi_internal64}
(nil))
during RTL pass: shorten
dump file: t.c.319r.shorten
t.c:6:1: internal compiler error: in extract_constrain_insn_cached, at
recog.c:2207
0x1018d693 _fatal_insn(char const*, rtx_def const*, char const*, int, char
const*)
../../latest-gcc-x86/gcc/rtl-error.c:108
0x1018d6e7 _fatal_insn_not_found(rtx_def const*, char const*, int, char const*)
../../latest-gcc-x86/gcc/rtl-error.c:118
0x1099a82b extract_constrain_insn_cached(rtx_insn*)
../../latest-gcc-x86/gcc/recog.c:2207
0x11393917 insn_min_length(rtx_insn*)
../../latest-gcc-x86/gcc/config/rs6000/rs6000.md:721
0x105bece3 shorten_branches(rtx_insn*)
../../latest-gcc-x86/gcc/final.c:1118
As I checked, when the FP registers are zeroed, the above failure happened.
I suspect that the issue still relate to the following statement:
machine_mode mode = reg_raw_mode[regno];
As I checked, the reg_raw_mode always return the integer mode that can be hold
by the hard registers, even though it’s FP register.
So, I still wondering:
1. Is there another available utility routine that returns the proper MODE for
the hard registers that can be readily used to zero the hard register?
2. If not, should I add one more target hook for this purpose? i.e
/* Return the proper machine mode that can be used to zero this hard register
specified by REGNO. */
machine_mode zero-call-used-regs-mode (unsigned int REGNO)
3. Or should I just delete the default implemeantion, and let the target to
implement it.
Thanks.
Qing
>
>
> Thanks for testing aarch64. I think there are two issues here,
> one in the patch and one in the aarch64 backend:
>
> - the patch should use emit_move_insn rather than use gen_rtx_SET directly.
>
> - the aarch64 backend doesn't handle zeroing TImode vector registers,
> but should. E.g. for:
>
> void
> foo ()
> {
> register __int128_t q0 asm ("q0");
> q0 = 0;
> asm volatile ("" :: "w" (q0));
> }
>
> we generate:
>
> mov x0, 0
> mov x1, 0
> fmov d0, x0
> fmov v0.d[1], x1
>
> which is, er, somewhat suboptimal.
>
> I'll try to fix the aarch64 bug for Monday next week.
>
> Thanks,
> Richard
