Christophe Lyon <[email protected]> writes:
> On Wed, 30 Sep 2020 at 12:53, Richard Sandiford via Gcc-patches
> <[email protected]> wrote:
>>
>> movti lacked an way of zeroing an FPR, meaning that we'd do:
>>
>> mov x0, 0
>> mov x1, 0
>> fmov d0, x0
>> fmov v0.d[1], x1
>>
>> instead of just:
>>
>> movi v0.2d, #0
>>
>> movtf had the opposite problem for GPRs: we'd generate:
>>
>> movi v0.2d, #0
>> fmov x0, d0
>> fmov x1, v0.d[1]
>>
>> instead of just:
>>
>> mov x0, 0
>> mov x1, 0
>>
>> Also, there was an unnecessary earlyclobber on the GPR<-GPR movtf
>> alternative (but not the movti one). The splitter handles overlap
>> correctly.
>>
>> The TF splitter used aarch64_reg_or_imm, but the _imm part only
>> accepts integer constants, not floating-point ones. The patch
>> changes it to nonmemory_operand instead.
>>
>> Tested on aarch64-linux-gnu, pushed.
>>
>> Richard
>>
>>
>> gcc/
>> * config/aarch64/aarch64.c (aarch64_split_128bit_move_p): Add a
>> function comment. Tighten check for FP moves.
>> * config/aarch64/aarch64.md (*movti_aarch64): Add a w<-Z alternative.
>> (*movtf_aarch64): Handle r<-Y like r<-r. Remove unnecessary
>> earlyclobber. Change splitter predicate from aarch64_reg_or_imm
>> to nonmemory_operand.
>>
>> gcc/testsuite/
>> * gcc.target/aarch64/movtf_1.c: New test.
>> * gcc.target/aarch64/movti_1.c: Likewise.
>
> Sorry to bother you, the new tests fail with -mabi=ilp32 :-(
> gcc.target/aarch64/movtf_1.c check-function-bodies load_q
> gcc.target/aarch64/movtf_1.c check-function-bodies load_x
> gcc.target/aarch64/movtf_1.c check-function-bodies store_q
> gcc.target/aarch64/movtf_1.c check-function-bodies store_x
> gcc.target/aarch64/movti_1.c check-function-bodies load_q
> gcc.target/aarch64/movti_1.c check-function-bodies load_x
> gcc.target/aarch64/movti_1.c check-function-bodies store_q
> gcc.target/aarch64/movti_1.c check-function-bodies store_x
Gah, should know by now that check-function-bodies and lp32 don't
go well together.
I've applied the below, sorry for the breakage. Hope I don't
introduce another slew of failures with the arm vcond stuff…
Richard
gcc/testsuite/
* gcc.target/aarch64/movtf_1.c: Restrict the asm matching to lp64.
* gcc.target/aarch64/movti_1.c: Likewise.
---
gcc/testsuite/gcc.target/aarch64/movtf_1.c | 2 +-
gcc/testsuite/gcc.target/aarch64/movti_1.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/testsuite/gcc.target/aarch64/movtf_1.c
b/gcc/testsuite/gcc.target/aarch64/movtf_1.c
index 570de931389..b975b208019 100644
--- a/gcc/testsuite/gcc.target/aarch64/movtf_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/movtf_1.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-O" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-final { check-function-bodies "**" "" "" { target lp64 } } } */
/*
** zero_q:
diff --git a/gcc/testsuite/gcc.target/aarch64/movti_1.c
b/gcc/testsuite/gcc.target/aarch64/movti_1.c
index 160e1acd281..5595b3e6f02 100644
--- a/gcc/testsuite/gcc.target/aarch64/movti_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/movti_1.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-O" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-final { check-function-bodies "**" "" "" { target lp64 } } } */
/*
** zero_q:
