Hello,

Straight backport of Joe's patch with no changes.

This patch fixes an issue with vmin* and vmax* intrinsics which accept
a scalar argument. Previously when the scalar was of different width
to the vector elements this would generate __ARM_undef. This change
allows the scalar argument to be implicitly converted to the correct
width. Also tidied up the relevant unit tests, some of which would
have passed even if only one of two or three intrinsic calls had
compiled correctly.

Bootstrapped and tested on arm-none-eabi, gcc and CMSIS_DSP
testsuites are clean. OK for trunk?

Thanks,
Joe

gcc/ChangeLog:

2020-08-10  Joe Ramsay  <joe.ram...@arm.com>

        * config/arm/arm_mve.h (__arm_vmaxnmavq): Remove coercion of scalar
        argument.
        (__arm_vmaxnmvq): Likewise.
        (__arm_vminnmavq): Likewise.
        (__arm_vminnmvq): Likewise.
        (__arm_vmaxnmavq_p): Likewise.
        (__arm_vmaxnmvq_p): Likewise (and delete duplicate definition).
        (__arm_vminnmavq_p): Likewise.
        (__arm_vminnmvq_p): Likewise.
        (__arm_vmaxavq): Likewise.
        (__arm_vmaxavq_p): Likewise.
        (__arm_vmaxvq): Likewise.
        (__arm_vmaxvq_p): Likewise.
        (__arm_vminavq): Likewise.
        (__arm_vminavq_p): Likewise.
        (__arm_vminvq): Likewise.
        (__arm_vminvq_p): Likewise.

gcc/testsuite/ChangeLog:

        * gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c: Add test for mismatched
        width of scalar argument.
        * gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxavq_s16.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxavq_s32.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxavq_s8.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxvq_s16.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxvq_s32.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxvq_s8.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxvq_u16.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxvq_u32.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vmaxvq_u8.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminavq_p_s16.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminavq_p_s32.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminavq_p_s8.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminavq_s16.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminavq_s32.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminavq_s8.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminnmavq_f16.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminnmavq_f32.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminnmvq_f16.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminnmvq_f32.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminvq_p_s16.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminvq_p_s32.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminvq_p_s8.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminvq_p_u16.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminvq_p_u32.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminvq_p_u8.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminvq_s16.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminvq_s32.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminvq_s8.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminvq_u16.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminvq_u32.c: Likewise.
        * gcc.target/arm/mve/intrinsics/vminvq_u8.c: Likewise.

(cherry picked from commit 251950d899bc3c18b5775fe9fe20bebbdc8d15cb)


###############     Attachment also inlined for ease of reply    ###############


diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h
index 
99cff41cccbe22f5f6bfe8db513092830885976c..26c83c7efefa34f17d8f8d30e5a3141f680041df
 100644
--- a/gcc/config/arm/arm_mve.h
+++ b/gcc/config/arm/arm_mve.h
@@ -41682,16 +41682,16 @@ extern void *__ARM_undef;
 #define __arm_vmaxavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxavq_s8 
(__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, int8x16_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxavq_s16 
(__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxavq_s32 
(__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxavq_s8 
(__p0, __ARM_mve_coerce(__p1, int8x16_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxavq_s16 
(__p0, __ARM_mve_coerce(__p1, int16x8_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxavq_s32 
(__p0, __ARM_mve_coerce(__p1, int32x4_t)));})
 
 #define __arm_vmaxavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxavq_p_s8 
(__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxavq_p_s16 
(__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxavq_p_s32 
(__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxavq_p_s8 
(__p0, __ARM_mve_coerce(__p1, int8x16_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxavq_p_s16 
(__p0, __ARM_mve_coerce(__p1, int16x8_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxavq_p_s32 
(__p0, __ARM_mve_coerce(__p1, int32x4_t), p2));})
 
 #define __arm_vmaxq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
   __typeof(p2) __p2 = (p2); \
@@ -41706,36 +41706,36 @@ extern void *__ARM_undef;
 #define __arm_vmaxvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxvq_s8 
(__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxvq_s16 
(__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxvq_s32 
(__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vmaxvq_u8 
(__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vmaxvq_u16 
(__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vmaxvq_u32 
(__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxvq_s8 
(__p0, __ARM_mve_coerce(__p1, int8x16_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxvq_s16 
(__p0, __ARM_mve_coerce(__p1, int16x8_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxvq_s32 
(__p0, __ARM_mve_coerce(__p1, int32x4_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vmaxvq_u8 
(__p0, __ARM_mve_coerce(__p1, uint8x16_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vmaxvq_u16 
(__p0, __ARM_mve_coerce(__p1, uint16x8_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vmaxvq_u32 
(__p0,__ARM_mve_coerce(__p1, uint32x4_t)));})
 
 #define __arm_vmaxvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxvq_p_s8 
(__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxvq_p_s16 
(__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxvq_p_s32 
(__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vmaxvq_p_u8 
(__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vmaxvq_p_u16 
(__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vmaxvq_p_u32 
(__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vmaxvq_p_s8 
(__p0, __ARM_mve_coerce(__p1, int8x16_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vmaxvq_p_s16 
(__p0, __ARM_mve_coerce(__p1, int16x8_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vmaxvq_p_s32 
(__p0, __ARM_mve_coerce(__p1, int32x4_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vmaxvq_p_u8 
(__p0, __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vmaxvq_p_u16 
(__p0, __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vmaxvq_p_u32 
(__p0, __ARM_mve_coerce(__p1, uint32x4_t), p2));})
 
 #define __arm_vminavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminavq_s8 
(__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, int8x16_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminavq_s16 
(__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminavq_s32 
(__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, int32x4_t)));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminavq_s8 
(__p0, __ARM_mve_coerce(__p1, int8x16_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminavq_s16 
(__p0, __ARM_mve_coerce(__p1, int16x8_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminavq_s32 
(__p0, __ARM_mve_coerce(__p1, int32x4_t)));})
 
 #define __arm_vminavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminavq_p_s8 
(__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminavq_p_s16 
(__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminavq_p_s32 
(__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminavq_p_s8 
(__p0, __ARM_mve_coerce(__p1, int8x16_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminavq_p_s16 
(__p0, __ARM_mve_coerce(__p1, int16x8_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminavq_p_s32 
(__p0, __ARM_mve_coerce(__p1, int32x4_t), p2));})
 
 #define __arm_vminq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
   __typeof(p2) __p2 = (p2); \
@@ -41750,22 +41750,22 @@ extern void *__ARM_undef;
 #define __arm_vminvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminvq_s8 
(__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminvq_s16 
(__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminvq_s32 
(__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vminvq_u8 
(__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vminvq_u16 
(__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vminvq_u32 
(__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminvq_s8 
(__p0, __ARM_mve_coerce(__p1, int8x16_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminvq_s16 
(__p0, __ARM_mve_coerce(__p1, int16x8_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminvq_s32 
(__p0, __ARM_mve_coerce(__p1, int32x4_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vminvq_u8 
(__p0, __ARM_mve_coerce(__p1, uint8x16_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vminvq_u16 
(__p0, __ARM_mve_coerce(__p1, uint16x8_t)), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vminvq_u32 
(__p0, __ARM_mve_coerce(__p1, uint32x4_t)));})
 
 #define __arm_vminvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminvq_p_s8 
(__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminvq_p_s16 
(__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminvq_p_s32 
(__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vminvq_p_u8 
(__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vminvq_p_u16 
(__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vminvq_p_u32 
(__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vminvq_p_s8 
(__p0, __ARM_mve_coerce(__p1, int8x16_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vminvq_p_s16 
(__p0, __ARM_mve_coerce(__p1, int16x8_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vminvq_p_s32 
(__p0, __ARM_mve_coerce(__p1, int32x4_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vminvq_p_u8 
(__p0, __ARM_mve_coerce(__p1, uint8x16_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vminvq_p_u16 
(__p0, __ARM_mve_coerce(__p1, uint16x8_t), p2), \
+  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vminvq_p_u32 
(__p0, __ARM_mve_coerce(__p1, uint32x4_t), p2));})
 
 #define __arm_vmladavaq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
   __typeof(p1) __p1 = (p1); \
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c
index 
02e02270d4dee2fa4065b35372959f9d5738ff5d..74ffad4e72695c761908876062dc03cbf7037f00
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c
@@ -10,7 +10,6 @@ foo (uint16_t a, int16x8_t b, mve_pred16_t p)
   return vmaxavq_p_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxavt.s16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)
   return vmaxavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxavt.s16"  }  } */
+
+int16_t
+foo2 (uint8_t a, int16x8_t b, mve_pred16_t p)
+{
+  return vmaxavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxavt.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c
index 
7ecd94abbe7752ff217b7852942f1a72d6ad5dd5..40800b0f12ef3a836692d25d7a50d4b5ff63e852
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c
@@ -10,7 +10,6 @@ foo (uint32_t a, int32x4_t b, mve_pred16_t p)
   return vmaxavq_p_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxavt.s32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)
   return vmaxavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxavt.s32"  }  } */
+
+int32_t
+foo2 (uint16_t a, int32x4_t b, mve_pred16_t p)
+{
+  return vmaxavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxavt.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c
index 
7a21de7815382ef00ad90ce150f875705ba44a01..7638737fb842de8fc22345b94065abac3096a8d3
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c
@@ -10,7 +10,6 @@ foo (uint8_t a, int8x16_t b, mve_pred16_t p)
   return vmaxavq_p_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxavt.s8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)
   return vmaxavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxavt.s8"  }  } */
+
+int8_t
+foo2 (uint32_t a, int8x16_t b, mve_pred16_t p)
+{
+  return vmaxavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxavt.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c
index 
4621eba63c756725746c09873aae4df24b9fd4d3..0dca149b3e8652cc3c2b5adbb40067ed65eb10a9
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c
@@ -10,7 +10,6 @@ foo (uint16_t a, int16x8_t b)
   return vmaxavq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxav.s16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, int16x8_t b)
@@ -18,4 +17,12 @@ foo1 (uint16_t a, int16x8_t b)
   return vmaxavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxav.s16"  }  } */
+
+int16_t
+foo2 (uint8_t a, int16x8_t b)
+{
+  return vmaxavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxav.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c
index 
8813d9da05347b4e0c4012140edd7e6af59853c6..f419a771017f74d1cf300dbe9ed31723ce254ca8
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c
@@ -10,7 +10,6 @@ foo (uint32_t a, int32x4_t b)
   return vmaxavq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxav.s32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, int32x4_t b)
@@ -18,4 +17,12 @@ foo1 (uint32_t a, int32x4_t b)
   return vmaxavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxav.s32"  }  } */
+
+int32_t
+foo2 (uint16_t a, int32x4_t b)
+{
+  return vmaxavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxav.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c
index 
961f1d28ad5aa176ebbdc6312b24cb26f0f4fb7e..214ad88f4aa6641f8d2cec917c67a4a7b774badf
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c
@@ -10,7 +10,6 @@ foo (uint8_t a, int8x16_t b)
   return vmaxavq_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxav.s8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, int8x16_t b)
@@ -18,4 +17,12 @@ foo1 (uint8_t a, int8x16_t b)
   return vmaxavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxav.s8"  }  } */
+
+int8_t
+foo2 (uint32_t a, int8x16_t b)
+{
+  return vmaxavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxav.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c
index 
de48ea8f932d1ac01b1f771cfcc6c98cfd8ebf6f..6d8cf19a3415c094e2ede662b78b35b8aa152388
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c
@@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b)
   return vmaxnmavq_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmav.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b)
@@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b)
   return vmaxnmavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmav.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b)
+{
+  return vmaxnmavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmav.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c
index 
b4c7f8369694132724d7d778c6b3b972d93be6ab..ef79030d8ebd892781748c8cdff497926189816b
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c
@@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b)
   return vmaxnmavq_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmav.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b)
@@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b)
   return vmaxnmavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmav.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b)
+{
+  return vmaxnmavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmav.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c
index 
9c2eed08c37127c6db82647a4b74b04fcd616292..f7f39f59dade185134069daa6b6e3ac0241fc382
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c
@@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b, mve_pred16_t p)
   return vmaxnmavq_p_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmavt.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
   return vmaxnmavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmavt.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b, mve_pred16_t p)
+{
+  return vmaxnmavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmavt.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c
index 
1cadccb6c8b909b1d980fb7e7b05258701c3f20b..341f6254a5a65cd5e77561fc398061f4343b1b9b
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c
@@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b, mve_pred16_t p)
   return vmaxnmavq_p_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmavt.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
   return vmaxnmavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmavt.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b, mve_pred16_t p)
+{
+  return vmaxnmavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmavt.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c
index 
81f4b9bd49a8c6661717e0938795f28745e392fe..80bd1d4cda100df86f60faa04f4c452928f1c630
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c
@@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b)
   return vmaxnmvq_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmv.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b)
@@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b)
   return vmaxnmvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmv.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b)
+{
+  return vmaxnmvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmv.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c
index 
ab06c2b3de2a59ebb09cb1529e9f4ada9deef34d..bb2fc46f88a617facd28748c576e8556d6dc2a69
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c
@@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b)
   return vmaxnmvq_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmv.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b)
@@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b)
   return vmaxnmvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxnmv.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b)
+{
+  return vmaxnmvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmv.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c
index 
e37c5a107bb8c96b4073f93d2ae6e07b87c95c7b..3efe203007b2bd3f29dee5db0d62da50de21f1cd
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c
@@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b, mve_pred16_t p)
   return vmaxnmvq_p_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmvt.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
   return vmaxnmvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmvt.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b, mve_pred16_t p)
+{
+  return vmaxnmvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmvt.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c
index 
884cd456614cc2299483898acd2c1282a3355f4d..6c13247f1f1db0eaa5752d9d19244f71a0fcb691
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c
@@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b, mve_pred16_t p)
   return vmaxnmvq_p_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmvt.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
   return vmaxnmvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxnmvt.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b, mve_pred16_t p)
+{
+  return vmaxnmvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxnmvt.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c
index 
79de370bfd76379df832c2c1242f372b3fe32b93..657efc51bea5856111fa3f1ece361327e6566ccd
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c
@@ -10,7 +10,6 @@ foo (int16_t a, int16x8_t b, mve_pred16_t p)
   return vmaxvq_p_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.s16"  }  } */
 
 int16_t
 foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
   return vmaxvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.s16"  }  } */
+
+int16_t
+foo2 (int8_t a, int16x8_t b, mve_pred16_t p)
+{
+  return vmaxvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxvt.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c
index 
e52674486eaabd75d2ed32f85a7fb483e78383b2..5882351c0fa4f6562bb76818f7d2a666528105fc
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c
@@ -10,7 +10,6 @@ foo (int32_t a, int32x4_t b, mve_pred16_t p)
   return vmaxvq_p_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.s32"  }  } */
 
 int32_t
 foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
   return vmaxvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.s32"  }  } */
+
+int32_t
+foo2 (int16_t a, int32x4_t b, mve_pred16_t p)
+{
+  return vmaxvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxvt.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c
index 
d3cedd4cd33977bf17c5db1bd818081511bcaa30..3737ecd3307fb5bd931e8fc9962b21209e1bfbd4
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c
@@ -10,7 +10,6 @@ foo (int8_t a, int8x16_t b, mve_pred16_t p)
   return vmaxvq_p_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.s8"  }  } */
 
 int8_t
 foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
   return vmaxvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.s8"  }  } */
+
+int8_t
+foo2 (int32_t a, int8x16_t b, mve_pred16_t p)
+{
+  return vmaxvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxvt.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c
index 
79572f7a246547f0fd4f0192ccdd2f43aa994442..348cf39caa0c32d283bd6d003c2b69334b13f611
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c
@@ -10,7 +10,6 @@ foo (uint16_t a, uint16x8_t b, mve_pred16_t p)
   return vmaxvq_p_u16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.u16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)
   return vmaxvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.u16"  }  } */
+
+uint16_t
+foo2 (uint32_t a, uint16x8_t b, mve_pred16_t p)
+{
+  return vmaxvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxvt.u16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c
index 
e2f7a6f332989108e674cdadf62ca5c33271a343..f2e976216c58e6cedb773fe6fc0c8ad70ffdcb67
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c
@@ -10,7 +10,6 @@ foo (uint32_t a, uint32x4_t b, mve_pred16_t p)
   return vmaxvq_p_u32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.u32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
   return vmaxvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.u32"  }  } */
+
+uint32_t
+foo2 (uint8_t a, uint32x4_t b, mve_pred16_t p)
+{
+  return vmaxvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxvt.u32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c
index 
f977806bf2ee0c5a224f075d0f920ba496b28e8c..7df5b63c9bc68d48715e707ef34dc949eca2cc99
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c
@@ -10,7 +10,6 @@ foo (uint8_t a, uint8x16_t b, mve_pred16_t p)
   return vmaxvq_p_u8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.u8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)
   return vmaxvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vmaxvt.u8"  }  } */
+
+uint8_t
+foo2 (uint16_t a, uint8x16_t b, mve_pred16_t p)
+{
+  return vmaxvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxvt.u8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c
index 
90f10b54bff3e92a957c48d35217a29f70efc32e..8412452cf3316a4db378672467a89795f5a0bcea
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c
@@ -10,7 +10,6 @@ foo (int16_t a, int16x8_t b)
   return vmaxvq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.s16"  }  } */
 
 int16_t
 foo1 (int16_t a, int16x8_t b)
@@ -18,4 +17,12 @@ foo1 (int16_t a, int16x8_t b)
   return vmaxvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.s16"  }  } */
+
+int16_t
+foo2 (int8_t a, int16x8_t b)
+{
+  return vmaxvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxv.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c
index 
aa0e88b94835066d6d7acd9c133f247019eb1c18..09f4909c9a8557ba1aac54cce9dfab77630072ae
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c
@@ -10,7 +10,6 @@ foo (int32_t a, int32x4_t b)
   return vmaxvq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.s32"  }  } */
 
 int32_t
 foo1 (int32_t a, int32x4_t b)
@@ -18,4 +17,12 @@ foo1 (int32_t a, int32x4_t b)
   return vmaxvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.s32"  }  } */
+
+int32_t
+foo2 (int16_t a, int32x4_t b)
+{
+  return vmaxvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxv.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c
index 
884b84d8e39dd4ea3ffaf66e8e8c2f23f6ca0467..a087bbc6b6466ad06e33534308a68b64d8dc05c2
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c
@@ -10,7 +10,6 @@ foo (int8_t a, int8x16_t b)
   return vmaxvq_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.s8"  }  } */
 
 int8_t
 foo1 (int8_t a, int8x16_t b)
@@ -18,4 +17,12 @@ foo1 (int8_t a, int8x16_t b)
   return vmaxvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.s8"  }  } */
+
+int8_t
+foo2 (int32_t a, int8x16_t b)
+{
+  return vmaxvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxv.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c
index 
2813ebdd3c672b8bc86492b440eb7bc6b83702f0..47fe0d1cf0f89b04b74aa58afd9c4acbae69137f
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c
@@ -10,7 +10,6 @@ foo (uint16_t a, uint16x8_t b)
   return vmaxvq_u16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.u16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, uint16x8_t b)
@@ -18,4 +17,12 @@ foo1 (uint16_t a, uint16x8_t b)
   return vmaxvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.u16"  }  } */
+
+uint16_t
+foo2 (uint32_t a, uint16x8_t b)
+{
+  return vmaxvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxv.u16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c
index 
ab51b1e108872c59c33fd6ac3d64d3387ea7e762..aa723daf5ddffeb20809c1851d18c232783e3725
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c
@@ -10,7 +10,6 @@ foo (uint32_t a, uint32x4_t b)
   return vmaxvq_u32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.u32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, uint32x4_t b)
@@ -18,4 +17,12 @@ foo1 (uint32_t a, uint32x4_t b)
   return vmaxvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.u32"  }  } */
+
+uint32_t
+foo2 (uint8_t a, uint32x4_t b)
+{
+  return vmaxvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxv.u32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c
index 
3326cfb4b660654157ba4527d38385bbed75c373..3aae785040c172ef86f6c818943eedb4e3fa11bb
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c
@@ -10,7 +10,6 @@ foo (uint8_t a, uint8x16_t b)
   return vmaxvq_u8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.u8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, uint8x16_t b)
@@ -18,4 +17,12 @@ foo1 (uint8_t a, uint8x16_t b)
   return vmaxvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmaxv.u8"  }  } */
+
+uint8_t
+foo2 (uint16_t a, uint8x16_t b)
+{
+  return vmaxvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vmaxv.u8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c
index 
6b876483bc48b7c31e639319adedfad9a2130f0b..9303ae02e39f38c0152f9279f7823b11e14486f0
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c
@@ -10,7 +10,6 @@ foo (uint16_t a, int16x8_t b, mve_pred16_t p)
   return vminavq_p_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminavt.s16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)
   return vminavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminavt.s16"  }  } */
+
+int16_t
+foo2 (uint8_t a, int16x8_t b, mve_pred16_t p)
+{
+  return vminavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminavt.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c
index 
086ff56b93572911afb09c791997380ba2d0f2d2..36247f68b2cbc192926a76a27eaf607ea88d2764
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c
@@ -10,7 +10,6 @@ foo (uint32_t a, int32x4_t b, mve_pred16_t p)
   return vminavq_p_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminavt.s32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)
   return vminavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminavt.s32"  }  } */
+
+int32_t
+foo2 (uint16_t a, int32x4_t b, mve_pred16_t p)
+{
+  return vminavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminavt.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c
index 
999c11ca73cf0fde0b6588048c15becce0a46782..d3361615dcc983e3d42ce2772441f74a00e13d5e
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c
@@ -10,7 +10,6 @@ foo (uint8_t a, int8x16_t b, mve_pred16_t p)
   return vminavq_p_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminavt.s8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)
   return vminavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminavt.s8"  }  } */
+
+int8_t
+foo2 (uint32_t a, int8x16_t b, mve_pred16_t p)
+{
+  return vminavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminavt.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c
index 
a626e3122914f0c730f501bf05a94e76c8f74d3f..17e4edca2f1acf8f94a22a9e9dae4c7868c0b455
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c
@@ -10,7 +10,6 @@ foo (uint16_t a, int16x8_t b)
   return vminavq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminav.s16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, int16x8_t b)
@@ -18,4 +17,12 @@ foo1 (uint16_t a, int16x8_t b)
   return vminavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminav.s16"  }  } */
+
+int16_t
+foo2 (uint8_t a, int16x8_t b)
+{
+  return vminavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminav.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c
index 
be575cb5da3ba37fdfaf9df7f37b92d726a3834f..032d02b885750c9b7077681ac7618c063b160ae0
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c
@@ -10,7 +10,6 @@ foo (uint32_t a, int32x4_t b)
   return vminavq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminav.s32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, int32x4_t b)
@@ -18,4 +17,12 @@ foo1 (uint32_t a, int32x4_t b)
   return vminavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminav.s32"  }  } */
+
+int32_t
+foo2 (uint16_t a, int32x4_t b)
+{
+  return vminavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminav.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c
index 
c3dfe4bfeba8a361aa16cad0966c15af7e9473b6..2a2bb3d614674652ac3a8a7956a2d394f36f27a8
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c
@@ -10,7 +10,6 @@ foo (uint8_t a, int8x16_t b)
   return vminavq_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminav.s8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, int8x16_t b)
@@ -18,4 +17,12 @@ foo1 (uint8_t a, int8x16_t b)
   return vminavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminav.s8"  }  } */
+
+int8_t
+foo2 (uint32_t a, int8x16_t b)
+{
+  return vminavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminav.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c
index 
2111681cea4d1ba86146816ef74c004b932a412e..fadb23e05c847a8f15b9ac1f15d8e6c89a1b34bc
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c
@@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b)
   return vminnmavq_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmav.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b)
@@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b)
   return vminnmavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmav.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b)
+{
+  return vminnmavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmav.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c
index 
bd87b85ec4a610674af1b4f5179c69ca634c5da0..84714a96b9f54c3aba7aad7bfa6e6ff7758e5679
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c
@@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b)
   return vminnmavq_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmav.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b)
@@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b)
   return vminnmavq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmav.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b)
+{
+  return vminnmavq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmav.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c
index 
e6d0bb5a8f011383cd92b635240624b822ca139e..c79fa307ae024e3c8d8697654af580f460bf4415
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c
@@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b, mve_pred16_t p)
   return vminnmavq_p_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmavt.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
   return vminnmavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmavt.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b, mve_pred16_t p)
+{
+  return vminnmavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmavt.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c
index 
6b56b67b7ba1f85446b6f6b652c5af4b82b659f6..bea04c7aac699dad5f21adc8aa3f8be070557855
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c
@@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b, mve_pred16_t p)
   return vminnmavq_p_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmavt.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
   return vminnmavq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmavt.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b, mve_pred16_t p)
+{
+  return vminnmavq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmavt.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c
index 
4d4caaea992e7ac5b507199f743bef87cee71278..0eb3a4af14ec57d60ec34bfc2d7210d8db60ef52
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c
@@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b)
   return vminnmvq_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmv.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b)
@@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b)
   return vminnmvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmv.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b)
+{
+  return vminnmvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmv.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c
index 
dab04d93f0f7275aad46264a518806a0ccdceb1c..f3183508f8e5088e7fa37aad0cca77c1014065d8
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c
@@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b)
   return vminnmvq_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmv.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b)
@@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b)
   return vminnmvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminnmv.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b)
+{
+  return vminnmvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmv.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c
index 
f5eafb1012261b1dcbee82c984e9997bf2938a60..16f6ac514c86d99c87708a6a69eca984f15f769b
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c
@@ -10,7 +10,6 @@ foo (float16_t a, float16x8_t b, mve_pred16_t p)
   return vminnmvq_p_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmvt.f16"  }  } */
 
 float16_t
 foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
   return vminnmvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmvt.f16"  }  } */
+
+float16_t
+foo2 (float32_t a, float16x8_t b, mve_pred16_t p)
+{
+  return vminnmvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmvt.f16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c
index 
5ac20bf305f66e50a919f0eff0a26b3d3dfbea7d..a8e4f9ffba7286a4b77c97ac156d79e3be3355d4
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c
@@ -10,7 +10,6 @@ foo (float32_t a, float32x4_t b, mve_pred16_t p)
   return vminnmvq_p_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmvt.f32"  }  } */
 
 float32_t
 foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
   return vminnmvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminnmvt.f32"  }  } */
+
+float32_t
+foo2 (float16_t a, float32x4_t b, mve_pred16_t p)
+{
+  return vminnmvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminnmvt.f32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c
index 
c2edb622d5a5c77376e0c5d6486998832786c37e..91bb63f6ba6ea0dcafb22db612aa42d44a58de67
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c
@@ -10,7 +10,6 @@ foo (int16_t a, int16x8_t b, mve_pred16_t p)
   return vminvq_p_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.s16"  }  } */
 
 int16_t
 foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
   return vminvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.s16"  }  } */
+
+int16_t
+foo2 (int8_t a, int16x8_t b, mve_pred16_t p)
+{
+  return vminvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminvt.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c
index 
ba8921715a41636774fc583382dc152e9dab4a6b..a846701312c858cf2cb6d9d9c113ce9c5a31fb53
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c
@@ -10,7 +10,6 @@ foo (int32_t a, int32x4_t b, mve_pred16_t p)
   return vminvq_p_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.s32"  }  } */
 
 int32_t
 foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
   return vminvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.s32"  }  } */
+
+int32_t
+foo2 (int16_t a, int32x4_t b, mve_pred16_t p)
+{
+  return vminvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminvt.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c
index 
1665c53f96e91c44e4b6d213bfaf33e96eae50c0..716d414f3a7555de8738349b35df01d2a6f08832
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c
@@ -10,7 +10,6 @@ foo (int8_t a, int8x16_t b, mve_pred16_t p)
   return vminvq_p_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.s8"  }  } */
 
 int8_t
 foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
   return vminvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.s8"  }  } */
+
+int8_t
+foo2 (int32_t a, int8x16_t b, mve_pred16_t p)
+{
+  return vminvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminvt.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c
index 
5bade0ac334f0591922d7c8c14e58a8f8af511af..cc7f8fe8933d3e773f91a8605287709f94492097
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c
@@ -10,7 +10,6 @@ foo (uint16_t a, uint16x8_t b, mve_pred16_t p)
   return vminvq_p_u16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.u16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)
   return vminvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.u16"  }  } */
+
+uint16_t
+foo2 (uint32_t a, uint16x8_t b, mve_pred16_t p)
+{
+  return vminvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminvt.u16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c
index 
c4c574882a384213b774ea12387ecffb7029eb14..6bde0be29ccf73a1cb36535a3d2677d4338c3da7
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c
@@ -10,7 +10,6 @@ foo (uint32_t a, uint32x4_t b, mve_pred16_t p)
   return vminvq_p_u32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.u32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
   return vminvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.u32"  }  } */
+
+uint32_t
+foo2 (uint8_t a, uint32x4_t b, mve_pred16_t p)
+{
+  return vminvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminvt.u32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c
index 
dc890dc34725816c5ec163a4ee05b044f68e4682..bb894904f3cfeee8c881bf7f2b13fb6d7e0f4f7a
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c
@@ -10,7 +10,6 @@ foo (uint8_t a, uint8x16_t b, mve_pred16_t p)
   return vminvq_p_u8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.u8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)
@@ -18,4 +17,12 @@ foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)
   return vminvq_p (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vminvt.u8"  }  } */
+
+uint8_t
+foo2 (uint16_t a, uint8x16_t b, mve_pred16_t p)
+{
+  return vminvq_p (a, b, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminvt.u8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c
index 
f6eed633f03f4ef7058f4579c4d36db0e2494f14..6d589aa4a0506cd18fb4942e5511b14fe15a2811
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c
@@ -10,7 +10,6 @@ foo (int16_t a, int16x8_t b)
   return vminvq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.s16"  }  } */
 
 int16_t
 foo1 (int16_t a, int16x8_t b)
@@ -18,4 +17,11 @@ foo1 (int16_t a, int16x8_t b)
   return vminvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.s16"  }  } */
+int16_t
+foo2 (int8_t a, int16x8_t b)
+{
+  return vminvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminv.s16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c
index 
4077c32fffec22e528cede2c4fcecc60a98ae008..7c727d6d92b05424aa8441bf8980355bee72f168
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c
@@ -10,7 +10,6 @@ foo (int32_t a, int32x4_t b)
   return vminvq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.s32"  }  } */
 
 int32_t
 foo1 (int32_t a, int32x4_t b)
@@ -18,4 +17,11 @@ foo1 (int32_t a, int32x4_t b)
   return vminvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.s32"  }  } */
+int32_t
+foo2 (int8_t a, int32x4_t b)
+{
+  return vminvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminv.s32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c
index 
bdf15f45acc98ff14969a7d311deac7dd45a898f..76309482fc56d6166d91f0845c3fb60dfdaaddfd
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c
@@ -10,7 +10,6 @@ foo (int8_t a, int8x16_t b)
   return vminvq_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.s8"  }  } */
 
 int8_t
 foo1 (int8_t a, int8x16_t b)
@@ -18,4 +17,11 @@ foo1 (int8_t a, int8x16_t b)
   return vminvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.s8"  }  } */
+int8_t
+foo2 (int32_t a, int8x16_t b)
+{
+  return vminvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminv.s8" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c
index 
5c0935c78cd48bebf0f565ffcccde623dc8e8aab..698975f456c708697f4c4820970b08c6321d81fc
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c
@@ -10,7 +10,6 @@ foo (uint16_t a, uint16x8_t b)
   return vminvq_u16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.u16"  }  } */
 
 uint16_t
 foo1 (uint16_t a, uint16x8_t b)
@@ -18,4 +17,12 @@ foo1 (uint16_t a, uint16x8_t b)
   return vminvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.u16"  }  } */
+
+uint8_t
+foo2 (uint32_t a, uint16x8_t b)
+{
+  return vminvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminv.u16" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c
index 
1580c87fbb1bfe67aea0fa1c29ad89adbc9aafe8..7489f81debfeda816fe29379b695afa50df3ac0e
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c
@@ -10,7 +10,6 @@ foo (uint32_t a, uint32x4_t b)
   return vminvq_u32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.u32"  }  } */
 
 uint32_t
 foo1 (uint32_t a, uint32x4_t b)
@@ -18,4 +17,11 @@ foo1 (uint32_t a, uint32x4_t b)
   return vminvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.u32"  }  } */
+uint32_t
+foo2 (uint16_t a, uint32x4_t b)
+{
+  return vminvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminv.u32" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c 
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c
index 
95919b412e0aeced0b6c2f4ab95cfa805e655d22..aa2b986d5587c2c7a79e86370cf179d5f8751db7
 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c
@@ -10,7 +10,6 @@ foo (uint8_t a, uint8x16_t b)
   return vminvq_u8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.u8"  }  } */
 
 uint8_t
 foo1 (uint8_t a, uint8x16_t b)
@@ -18,4 +17,12 @@ foo1 (uint8_t a, uint8x16_t b)
   return vminvq (a, b);
 }
 
-/* { dg-final { scan-assembler "vminv.u8"  }  } */
+
+uint16_t
+foo2 (uint32_t a, uint8x16_t b)
+{
+  return vminvq (a, b);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-times "vminv.u8" 3 } } */

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