On Wed, Oct 14, 2020 at 07:55:55PM +0200, Richard Biener wrote: > On October 14, 2020 7:35:32 PM GMT+02:00, Segher Boessenkool > <[email protected]> wrote: > >On Wed, Oct 14, 2020 at 01:43:45PM +0800, Hongtao Liu wrote: > >> On Wed, Oct 14, 2020 at 4:01 AM Segher Boessenkool > >> <[email protected]> wrote: > >> > On Tue, Oct 13, 2020 at 04:40:53PM +0800, Hongtao Liu wrote: > >> > > For rtx like > >> > > (vec_select:V2SI (subreg:V4SI (inner:V2SI) 0) > >> > > (parallel [(const_int 0) (const_int 1)])) > >> > > it could be simplified as inner. > >> > > >> > You could even simplify any vec_select of a subreg of X to just a > >> > vec_select of X, by changing the selection vector a bit (well, only > >do > >> > >> Yes, when SUBREG_BYTE of trueop0 is not 0, we need to add offset to > >selection. > > > >Exactly. > > > >> > this if that is a constant vector, I suppose). Not just for > >paradoxical > >> > subregs either, just for *all* subregs. > >> > >> Yes, and only when X has the same inner mode and more elements. > > > >No, for *all*. The mode of the first argument of vec_select does not > >have to equal its result mode. > > But IIRC the component mode needs to match.
Yeah, good point, at least the i386 backend uses crazy subregs, which is why validate_subreg does not test this :-( Segher
