xiezhiheng <xiezhih...@huawei.com> writes: >> -----Original Message----- >> From: Richard Sandiford [mailto:richard.sandif...@arm.com] >> Sent: Tuesday, November 10, 2020 7:54 PM >> To: xiezhiheng <xiezhih...@huawei.com> >> Cc: gcc-patches@gcc.gnu.org >> Subject: Re: [PATCH PR94442] [AArch64] Redundant ldp/stp instructions >> emitted at -O3 >> >> xiezhiheng <xiezhih...@huawei.com> writes: >> >> -----Original Message----- >> >> From: Richard Sandiford [mailto:richard.sandif...@arm.com] >> >> Sent: Tuesday, November 3, 2020 9:57 PM >> >> To: xiezhiheng <xiezhih...@huawei.com> >> >> Cc: gcc-patches@gcc.gnu.org >> >> Subject: Re: [PATCH PR94442] [AArch64] Redundant ldp/stp instructions >> >> emitted at -O3 >> >> >> >> Thanks, I pushed both patches to trunk. >> >> >> > >> > Thanks. And I made two separate patches for these two groups, tbl/tbx >> intrinsics and >> > the rest of the arithmetic operation intrinsics. >> > >> > Note: It does not matter which patch is applied first. >> >> I pushed the TBL/TBX one, but on the other patch: >> >> > @@ -297,7 +297,7 @@ >> > BUILTIN_VSDQ_I (USHIFTIMM, uqshl_n, 0, ALL) >> > >> > /* Implemented by aarch64_reduc_plus_<mode>. */ >> > - BUILTIN_VALL (UNOP, reduc_plus_scal_, 10, ALL) >> > + BUILTIN_VALL (UNOP, reduc_plus_scal_, 10, FP) >> >> This is defined for integer and FP modes, so I think it should be >> NONE instead of FP. We'll automatically add FLAGS_FP based on the >> mode where necessary. >> > > Sorry, and I have revised a new patch. > Bootstrapped and tested on aarch64 Linux platform.
LGTM, thanks. Pushed to trunk. Richard > Thanks, > Xie Zhiheng > > > diff --git a/gcc/ChangeLog b/gcc/ChangeLog > index 75092451216..d6a49d65214 100644 > --- a/gcc/ChangeLog > +++ b/gcc/ChangeLog > @@ -1,3 +1,9 @@ > +2020-11-11 Zhiheng Xie <xiezhih...@huawei.com> > + Nannan Zheng <zhengnan...@huawei.com> > + > + * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG > + for arithmetic operation intrinsics. > +
