On Fri, Dec 04, 2020 at 07:06:45PM +0100, Uros Bizjak wrote:
> No, I didn't want to burden you with the additional task - the patch
> is OK as it is. I was just thinking out loud, as I remembered that
> changing bt patterns to combine splitter regressed one testcase. IIRC
> combination of two insns blocked better combination of three insns, or
> something like that.
Here is the patch to simplify the newly added combine splitters,
when we split into 2 insns anyway, no reason to split into the masking
define_insn_and_split we'd be splitting shortly after.
Passes the new testcase, ok if it passes bootstrap/regtest on x86_64-linux
and i686-linux?
2020-12-04 Jakub Jelinek <ja...@redhat.com>
PR target/96226
* config/i386/i386.md (splitter after *<rotate_insn><mode>3_mask,
splitter after *<rotate_insn><mode>3_mask_1): Drop the masking from
the patterns to split into.
--- gcc/config/i386/i386.md.jj 2020-12-04 18:44:23.494052861 +0100
+++ gcc/config/i386/i386.md 2020-12-04 19:00:22.192626807 +0100
@@ -11988,8 +11988,7 @@ (define_split
[(set (match_dup 4) (match_dup 1))
(set (match_dup 0)
(any_rotate:SWI48 (match_dup 4)
- (subreg:QI
- (and:SI (match_dup 2) (match_dup 3)) 0)))]
+ (subreg:QI (match_dup 2) 0)))]
"operands[4] = gen_reg_rtx (<MODE>mode);")
(define_insn_and_split "*<rotate_insn><mode>3_mask_1"
@@ -12023,8 +12022,7 @@ (define_split
== GET_MODE_BITSIZE (<MODE>mode) - 1"
[(set (match_dup 4) (match_dup 1))
(set (match_dup 0)
- (any_rotate:SWI48 (match_dup 4)
- (and:QI (match_dup 2) (match_dup 3))))]
+ (any_rotate:SWI48 (match_dup 4) (match_dup 2)))]
"operands[4] = gen_reg_rtx (<MODE>mode);")
;; Implement rotation using two double-precision
Jakub
