> diff --git a/gcc/config/riscv/elf.h b/gcc/config/riscv/elf.h
> index 973efdaed7b..7e65e499031 100644
> --- a/gcc/config/riscv/elf.h
> +++ b/gcc/config/riscv/elf.h
> @@ -18,7 +18,7 @@ along with GCC; see the file COPYING3. If not see
> <http://www.gnu.org/licenses/>. */
>
> #define LINK_SPEC "\
> --melf" XLEN_SPEC "lriscv \
> +-melf" XLEN_SPEC DEFAULT_ENDIAN_SPEC "riscv \
Could you extract the endian related LINK_SPEC change to
ENDIAN_LINK_SPEC to riscv.h, so that we can prevent
duplicate this several times.
> %{mno-relax:--no-relax} \
> %{mbig-endian:-EB} \
> %{mlittle-endian:-EL} \
> diff --git a/gcc/config/riscv/freebsd.h b/gcc/config/riscv/freebsd.h
> index f3aca9f7673..6018e7bb764 100644
> --- a/gcc/config/riscv/freebsd.h
> +++ b/gcc/config/riscv/freebsd.h
> @@ -40,7 +40,7 @@ along with GCC; see the file COPYING3. If not see
>
> #undef LINK_SPEC
> #define LINK_SPEC " \
> - -melf" XLEN_SPEC "lriscv \
> + -melf" XLEN_SPEC DEFAULT_ENDIAN_SPEC "riscv \
> %{p:%nconsider using `-pg' instead of `-p' with gprof (1)} \
> %{v:-V} \
> %{assert*} %{R*} %{rpath*} %{defsym*} \
> diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h
> index e74f5d3f914..fce5b896e6e 100644
> --- a/gcc/config/riscv/linux.h
> +++ b/gcc/config/riscv/linux.h
> @@ -58,7 +58,7 @@ along with GCC; see the file COPYING3. If not see
> "%{mabi=ilp32:_ilp32}"
>
> #define LINK_SPEC "\
> --melf" XLEN_SPEC "lriscv" LD_EMUL_SUFFIX " \
> +-melf" XLEN_SPEC DEFAULT_ENDIAN_SPEC "riscv" LD_EMUL_SUFFIX " \
> %{mno-relax:--no-relax} \
> %{mbig-endian:-EB} \
> %{mlittle-endian:-EL} \
> diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
> index ff41795a031..06f4739db79 100644
> --- a/gcc/config/riscv/riscv.c
> +++ b/gcc/config/riscv/riscv.c
> @@ -5499,6 +5499,11 @@ riscv_asan_shadow_offset (void)
> #undef TARGET_ASAN_SHADOW_OFFSET
> #define TARGET_ASAN_SHADOW_OFFSET riscv_asan_shadow_offset
>
> +#ifdef TARGET_BIG_ENDIAN_DEFAULT
> +#undef TARGET_DEFAULT_TARGET_FLAGS
> +#define TARGET_DEFAULT_TARGET_FLAGS (MASK_BIG_ENDIAN)
> +#endif
> +
> struct gcc_target targetm = TARGET_INITIALIZER;
>
> #include "gt-riscv.h"
> diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
> index 0b667d2e8b9..3cc3e864a3e 100644
> --- a/gcc/config/riscv/riscv.h
> +++ b/gcc/config/riscv/riscv.h
> @@ -30,6 +30,12 @@ along with GCC; see the file COPYING3. If not see
> /* Target CPU versions for D. */
> #define TARGET_D_CPU_VERSIONS riscv_d_target_versions
>
> +#ifdef TARGET_BIG_ENDIAN_DEFAULT
> +#define DEFAULT_ENDIAN_SPEC "b"
> +#else
> +#define DEFAULT_ENDIAN_SPEC "l"
> +#endif
> +
> /* Default target_flags if no switches are specified */
>
> #ifndef TARGET_DEFAULT
> --
> 2.26.2
>
